Features

50% Less I

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9-Bit inverting BTL latching transceiver

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Meets IEEE 1194.1 Standard on Backplane Transceiver

Logic (BTL)

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Very low bus-port capacitance — 3 pF typical

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Supports live insertion

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Glitch free power-up/down protection

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Fast propagation delays

— An to Bn (Fall-Thru Mode) 6.0 ns max

— Bn to An (Bypass Mode) 7.0 ns max

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1V Signal swings with 80 mA sink capability

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Open drain bus-port outputs allow Wired-OR connection

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Controlled rise and fall time to reduce noise coupling to

adjacent lines

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TTL compatible Driver and Control inputs

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Built in Bandgap reference with separate QV

QGND pins for precise receiver thresholds

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Individual bus-port ground pins

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Tight skew —

— Driver 2.0 ns max

— Receiver 2.5 ns max

Connection Diagram

Ordering Information

NSID

Package

NS Package Number

DS38C86AVB

PQFP (7x7)

VBH48A

DS012623-3

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