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DRV3201QPAPQ1 Datasheet(PDF) 2 Page - Texas Instruments |
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DRV3201QPAPQ1 Datasheet(HTML) 2 Page - Texas Instruments |
2 / 44 page DRV3201-Q1 SLVSBD6 – MAY 2012 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. THERMAL INFORMATION DRV3201 THERMAL METRIC(1) HTQFP UNIT PAP - 64 PINS θJA Junction-to-ambient thermal resistance 21.6 θJCtop Junction-to-case (top) thermal resistance 10.9 θJB Junction-to-board thermal resistance 4.5 °C/W ψJT Junction-to-top characterization parameter 0.1 ψJB Junction-to-board characterization parameter 4.4 θJCbot Junction-to-case (bottom) thermal resistance 0.3 (1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. 2 Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s): DRV3201-Q1 |
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