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CD74ACT86MDREP Datasheet(PDF) 1 Page - Texas Instruments |
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CD74ACT86MDREP Datasheet(HTML) 1 Page - Texas Instruments |
1 / 11 page www.ti.com FEATURES D PACKAGE (TOP VIEW) 1 2 3 4 5 6 7 14 13 12 11 10 9 8 1A 1B 1Y 2A 2B 2Y GND VCC 4B 4A 4Y 3B 3A 3Y DESCRIPTION/ORDERING INFORMATION CD74ACT86-EP QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE SCHS357 – MARCH 2006 • Controlled Baseline • SCR-Latchup-Resistant CMOS Process and Circuit Design – One Assembly/Test Site, One Fabrication Site • Exceeds 2-kV ESD Protection Per MIL-STD-883, Method 3015 • Extended Temperature Performance of –55 °C to 125°C • Enhanced Diminishing Manufacturing Sources (DMS) Support • Enhanced Product-Change Notification • Qualification Pedigree (1) • Inputs Are TTL-Voltage Compatible • Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption • Balanced Propagation Delays • ±24-mA Output Drive Current – Fanout to 15 F Devices (1) Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits. The CD74ACT86-EP is a quadruple 2-input exclusive-OR gate. This device performs the Boolean function Y = A ⊕ B or Y = AB + AB in positive logic. A common application is as a true/complement element. If one of the inputs is low, the other input is reproduced in true form at the output. If one of the inputs is high, the signal on the other input is reproduced inverted at the output. ORDERING INFORMATION TA PACKAGE(1) ORDERABLE PART NUMBER TOP-SIDE MARKING –55 °C to 125°C SOIC – D Tape and Reel CD74ACT86MDREP ACT86MEP (1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE (EACH GATE) INPUTS OUTPUT Y A B L L L L H H H L H H H L Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Copyright © 2006, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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