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DAC1220 Datasheet(PDF) 10 Page - Texas Instruments |
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DAC1220 Datasheet(HTML) 10 Page - Texas Instruments |
10 / 26 page t 14 t 9 IN7 IN0 IN1 INM IN1 IN0 IN7 Write Register Data IN7 OUT0 OUT1 OUTM IN1 IN0 IN7 Read Register Data SCLK SDIO SDIO CS SCLK SDIO t 15 t 10 IN7 IN0 IN1 IN0 IN1 IN7 INM t 10 t 9 Write Register Data SDIO IN7 OUT0 OUT1 IN0 IN1 IN7 OUTM Read Register Data OUT MSB OUT0 t 12 t 10 t 9 SDIO is an input SDIO is an output IN7 t 13 t 11 IN0 CS SCLK SDIO DAC1220 SBAS082G – FEBRUARY 1998 – REVISED SEPTEMBER 2009...................................................................................................................................... www.ti.com Figure 9. Serial Interface Timing (CS Low) Figure 10. Serial Interface Timing (Using CS) Figure 11. SDIO Input to Output Transition Timing Table 4. Serial Interface Timing Characteristics SYMBOL DESCRIPTION MIN NOM MAX UNITS Falling edge of last SCLK for command to t9 13 × tXIN ns rising edge of first SCLK for register data t10 Falling edge of CS to rising edge of SCLK 11 × tXIN ns Falling edge of last SCLK for command to SDIO as t11 8 × tXIN 10 × tXIN ns output SDIO as output to rising edge of first SCLK t12 4 × tXIN ns for register data Falling edge of last SCLK for register data to SDIO t13 4 × tXIN 6 × tXIN ns tri-state Falling edge of last SCLK for register data to t14 rising edge of first SCLK of next command (CS tied 41 × tXIN ns low) t15 Rising edge of CS to falling edge of CS (using CS) 22 × tXIN ns 10 Submit Documentation Feedback Copyright © 1998–2009, Texas Instruments Incorporated Product Folder Link(s): DAC1220 |
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