Document Number : 38-05633 Rev. *G

Page 8 of 13

Figure 4. Write Cycle 1 (WE Controlled)[21, 22, 23, 24, 25]

Figure 5. Write Cycle 2 (CE Controlled)[21, 22, 23, 24, 25]

Notes

23. During this period, the I/Os are in output state and input signals should not be applied.

these signals can terminate a write by going INACTIVE. The data input set-up and hold timing should be referenced to the edge of the signal that terminates the write.

t

HD

t

SD

t

PWE

t

SA

t

HA

t

AW

t

SCE

t

WC

t

HZOE

VALID DATA IN

CE

ADDRESS

WE

DATA I/O

OE

BHE

t

BW

See Note 23

t

HD

t

SD

t

HA

t

AW

t

SCE

t

WC

t

HZOE

VALID DATA IN

CE

ADDRESS

WE

DATA I/O

OE

See Note 23

BHE/BLE

t

BW