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CY14B101J2-SXIT Datasheet(PDF) 7 Page - Cypress Semiconductor |
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CY14B101J2-SXIT Datasheet(HTML) 7 Page - Cypress Semiconductor |
7 / 31 page CY14C101J CY14B101J CY14E101J Document Number: 001-54050 Rev. *I Page 7 of 31 Slave Device Address Every slave device on an I2C bus has a device select address. The first byte after START condition contains the slave device address with which the master intends to communicate. The seven MSBs are the device address and the LSB (R/W bit) is used for indicating Read or Write operation. The CY14X101J reserves two sets of upper 4 MSBs [7:4] in the slave device address field for accessing Memory and Control Registers. The accessing mechanism is described in Memory Slave Device. The nvSRAM product provides two different functionalities: Memory and Control Registers functions (such as serial number and product ID). The two functions of the device are accessed through different slave device addresses. The first four most significant bits [7:4] in the device address register are used to select between the nvSRAM functions. Memory Slave Device The nvSRAM device is selected for Read/Write if the master issues the slave address as 1010b followed by two bits of device select. If slave address sent by the master matches with the Memory Slave device address then depending on the R/W bit of the slave address, data is either read from (R/W = ‘1’) or written to (R/W = ‘0’) the nvSRAM. The address length for CY14X101J is 17 bits and thus it requires 3 address bytes to map the entire memory address location. To save an extra byte for memory addressing, the 17th bit (A16) is mapped to the slave address select bit (A0). The dedicated two address bytes represent bit A0 to A15. Control Registers Slave Device The Control Registers Slave device includes the Serial Number, Product ID, Memory Control and Command Register. The nvSRAM Control Register Slave device is selected for Read/Write if the master issues the Slave address as 0011b followed by two bits of device select. Then, depending on the R/W bit of the Slave address, data is either read from (R/W = ‘1’) or written to (R/W = ‘0’) the device. Table 1. Slave device Addressing Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 nvSRAM Function Select CY14X101J Slave Devices 1 0 1 0 Device Select ID A16 R/W Selects Memory Memory, 128 K × 8 0 0 1 1 Device Select ID X R/W Selects Control Registers Control Registers - Memory Control Register, 1 × 8 - Serial Number, 8 × 8 - Device ID, 4 × 8 - Command Register, 1 × 8 Figure 8. Memory Slave Device Address handbook, halfpage R/W LSB MSB Slave ID 10 1 0 A2 A16 A1 Device Select MSB of Address Figure 9. Control Registers Slave Device Address Table 2. Control Registers Map Address Description Read/Write Details 0x00 Memory Control Register Read/Write Contains Block Protect Bits and Serial Number Lock bit 0x01 Serial Number 8 Bytes Read/Write (Read only when SNL is set) Programmable Serial Number. Locked by setting the Serial Number lock bit in the Memory Control Register to ‘1’. 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 Device ID Read only Device ID is factory programmed 0x0A 0x0B 0x0C 0x0D Reserved Reserved Reserved handbook, halfpage R/W LSB MSB Slave ID 00 1 1 A2 X A1 Device Select |
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