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CY8C21634-24LTXIT Datasheet(PDF) 1 Page - Cypress Semiconductor |
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CY8C21634-24LTXIT Datasheet(HTML) 1 Page - Cypress Semiconductor |
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1 / 50 page  CY8C21634, CY8C21534, CY8C21434 CY8C21334, CY8C21234 PSoC® Programmable System-on-Chip™ Cypress Semiconductor Corporation • 198 Champion Court • San Jose , CA 95134-1709 • 408-943-2600 Document Number: 38-12025 Rev. *Y Revised July 26, 2012 PSoC® Programmable System-on-Chip™ Features ■ Powerful Harvard-architecture processor ❐ M8C processor speeds up to 24 MHz ❐ Low power at high speed ❐ Operating voltage: 2.4 V to 5.25 V ❐ Operating voltages down to 1.0 V using on-chip switch mode pump (SMP) ❐ Industrial temperature range: –40 °C to +85 °C ■ Advanced peripherals (PSoC® blocks) ❐ Four analog Type E PSoC blocks provide: • Two comparators with digital-to-analog converter (DAC) references • Single or dual 10-bit 28 channel analog-to-digital converters (ADC) ❐ Four digital PSoC blocks provide: • 8- to 32-bit timers, counters, and pulse width modulators (PWMs) • Cyclical redundancy check (CRC) and pseudo random sequence (PRS) modules • Full-duplex universal asynchronous receiver transmitter (UART), serial peripheral interface (SPI) master or slave • Connectable to all general purpose I/O (GPIO) pins ❐ Complex peripherals by combining blocks ■ Flexible on-chip memory ❐ 8 KB flash program storage 50,000 erase/write cycles ❐ 512 bytes static random access memory (SRAM) data storage ❐ In-system serial programming (ISSP) ❐ Partial flash updates ❐ Flexible protection modes ❐ EEPROM emulation in flash ■ Complete development tools ❐ Free development software (PSoC Designer™) ❐ Full-featured, in-circuit emulator (ICE) and programmer ❐ Full-speed emulation ❐ Complex breakpoint structure ❐ 128-KB trace memory ■ Precision, programmable clocking ❐ Internal ±2.5% 24- / 48-MHz main oscillator ❐ Internal oscillator for watchdog and sleep ■ Programmable pin configurations ❐ 25-mA sink, 10-mA source on all GPIOs ❐ Pull-up, pull-down, high Z, strong, or open-drain drive modes on all GPIOs ❐ Up to eight analog inputs on GPIOs ❐ Configurable interrupt on all GPIOs ■ Versatile analog mux ❐ Common internal analog bus ❐ Simultaneous connection of I/O combinations ❐ Capacitive sensing application capability ■ Additional system resources ❐ I2C master, slave, and multi-master to 400 kHz ❐ Watchdog and sleep timers ❐ User-configurable low-voltage detection (LVD) ❐ Integrated supervisory circuit ❐ On-chip precision voltage reference Logic Block Diagram |
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