CY8CMBR2044

Document Number: 001-57451 Rev. *E

Page 3 of 29

Pinout

Table 1. Pin Diagram and Definitions – CY8CMBR2044

Pin

Label

Type [2]

Description

If Unused

1

GPO1

DO

GPO activated by CS1

Leave

open

2

GPO0

DO

GPO activated by CS0

Leave

open

3

Toggle/

FSS

AI

Controls FSS and Toggle

ON/OFF features

Ground

4

Delay

AI

Controls LED ON Time. For

details refer to Table 2 on page 6

Ground

5

CS0

AIO

CapSense input, controls GPO0

or serial debug data out

Ground

6

CS1

AIO

CapSense input, controls GPO1

or serial debug data out

Ground

PGround

8

CS2

AIO

CapSense input, controls GPO2

or serial debug data out

Ground

9

ARST

AIDO

Controls Button Auto Reset

Leave

open

10

CS3

AIO

CapSense input, controls GPO3

or serial debug data out

Ground

11

XRES

DI

Device reset, active high, with

internal pull down

Leave

open

12

ScanRate

/

Sleep

AI

Controls scan rate and deep

sleep

Ground

13

P

Power

14

GPO3

DO

GPO activated by CS3

Leave

open

15

AI

External modulator capacitor,

connect a 2.2 nF (±10%) to

ground

16

GPO2

DO

GPO activated by CS2

Leave

open

QFN

(Top View)

GPO1

Toggle/FSS

Delay

1

2

3

4

11

10

9

ScanRate/Sleep

ARST

GPO0

CS3

XRES

12

Note

2. AI – Analog Input, AIO – Analog Input / Output, AIDO – Analog Input / Digital Output, DI – Digital Input, DO – Digital Output, P – Power