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CY7C008V Datasheet(PDF) 10 Page - Cypress Semiconductor |
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CY7C008V Datasheet(HTML) 10 Page - Cypress Semiconductor |
10 / 23 page CY7C008V/009V CY7C018V/019V Document Number: 38-06044 Rev. *E Page 10 of 23 Data Retention Mode The CY7C008V/009V and CY7C018V/019V are designed with battery backup in mind. Data retention voltage and supply current are guaranteed over temperature. The following rules ensure data retention: 1. Chip enable (CE) must be held HIGH during data retention, within VCC to VCC – 0.2 V. 2. CE must be kept between VCC – 0.2 V and 70% of VCC during the power-up and power-down transitions. 3. The RAM can begin operation > tRC after VCC reaches the minimum operating voltage (3.0 V). Timing Parameter Test Conditions[22] Max Unit ICCDR1 @ VCCDR = 2 V 50 A Data Retention Mode 3.0 V 3.0 V VCC 2.0 V VCC to VCC – 0.2 V VCC CE tRC V IH Note 22. CE = VCC, Vin = GND to VCC, TA = 25C. This parameter is guaranteed but not tested. [+] Feedback |
Similar Part No. - CY7C008V_12 |
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Similar Description - CY7C008V_12 |
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