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MAX11122ATI+ Datasheet(PDF) 30 Page - Maxim Integrated Products |
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MAX11122ATI+ Datasheet(HTML) 30 Page - Maxim Integrated Products |
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30 / 40 page  30 MAX11120–MAX11128 1Msps, Low-Power, Serial 12-/10-/8-Bit, 4-/8-/16-Channel ADCs Table 7. RANGE Register (RANGE Settings Only Applies to Bipolar Fully Differential Analog Input Configurations) ADC OUTPUT as a Function of Unipolar and Bipolar Modes The ADC Scan Control register (Table 3) determines the ADC mode of operation. The Unipolar and Bipolar regis- ters in Table 10 and Table 11 determine output coding and whether input configuration is single-ended or fully differential. Table 9 details the conversion output for analog inputs, AIN0 and AIN1. The truth table is consistent for any other valid input pairs (AINn/AINn+1). Table 8 shows the appli- cable input signal format with respect to analog input configurations. CHSEL[3:0] is used for MANUAL, REPEAT, STANDARD_EXT, STANDARD_INT, UPPER_EXT, UPPER_INT modes of operation. CHSCAN[15:0] is used for CUSTOM_EXT and CUSTOM_INT modes of operation. SampleSet Mode of Operation The SampleSet register stores the unique channel sequence length. The sequence pattern is comprised of up to 256 unique single-ended and/or differential conver- sions with any order or pattern. Patterns are assembled in 4-bit channel identifier nib- bles as described in Table 4. Figure 10 presents the SampleSet timing diagram. Note that two CS frames are required to configure the SampleSet functionality. The first frame indicates the sequence length. The second frame is used to encode the channel sequence pattern. After the SampleSet register has been coded (Table 14), by the next falling edge of CS, the new SampleSet pattern is activated (Figure 10). If the pattern length is less than SEQ_LENGTH, the remaining channels default to AIN0. If the select pattern length is greater than SEQ_LENGTH, the additional data is ignored as the ADC waits for the ris- ing edge of CS. If CS is asserted in the middle of a nibble, the full nibble defaults to AIN0. BIT NAME BIT DEFAULT STATE FUNCTION RANGE_SETUP 15:11 N/A Set to 10011 to select the RANGE register RANGE0/1 10 0 Set to 0 for AIN0/1: +VREF+/2 Set to 1 for AIN0/1: +VREF+ RANGE2/3 9 0 Set to 0 for AIN2/3: +VREF+/2 Set to 1 for AIN2/3: +VREF+ RANGE4/5 8 0 Set to 0 for AIN4/5: +VREF+/2 Set to 1 for AIN4/5: +VREF+ RANGE6/7 7 0 Set to 0 for AIN6/7: +VREF+/2 Set to 1 for AIN6/7: +VREF+ RANGE8/9 6 0 Set to 0 for AIN8/9: +VREF+/2 Set to 1 for AIN8/9: +VREF+ RANGE10/11 5 0 Set to 0 for AIN10/11: +VREF+/2 Set to 1 for AIN10/11: +VREF+ RANGE12/13 4 0 Set to 0 for AIN12/13: +VREF+/2 Set to 1 for AIN12/13: +VREF+ RANGE14/15 3 0 Set to 0 for AIN14/15: +VREF+/2 Set to 1 for AIN14/15: +VREF+ — 2:0 000 Unused |
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