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SP488CT Datasheet(PDF) 3 Page - Sipex Corporation |
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SP488CT Datasheet(HTML) 3 Page - Sipex Corporation |
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3 / 6 page  3 SP488/489 Quad RS-485/RS-422 Line Receivers © Copyright 2000 Sipex Corporation A B 54 Ω 100pF DI 1/4 SP486 1/4 SP488 100pF EN EN ROn DRIVER RCVR CL Figure 1. Timing Test Circuit S1 RCVR S2 VCC 1k Ω CL 1k Ω Figure 2. Enable/Disable Timing Test Circuit Pin 6 — RI 2A — Receiver 2 input A. Pin 7 — RI 2B — Receiver 2 input B. Pin 8 — GND — Digital Ground. Pin 9 — RI 3B — Receiver 3 input B. Pin 10 — RI 3A — Receiver 3 input A. Pin 11 — RO 3 — Receiver 3 Output — If Receiver 3 output is enabled, if RI 3A > RI3B by 200mV, Receiver 3 output is high. If Receiver 3 output is enabled, and if RI 3A < RI3B by 200mV, Receiver 3 output is low. Pin 12 — EN — Receiver Output Enable. Please refer to SP488 Truth Table (1). SP488 PINOUT Pin 1 — RI 1B — Receiver 1 input B. Pin 2 — RI 1A — Receiver 1 input A. Pin 3 — RO 1 — Receiver 1 Output — If Re- ceiver 1 output is enabled, if RI 1A > RI1B by 200mV, Receiver output is high. If Receiver 1 output is enabled, and if RI 1A < RI1B by 200mV, Receiver 1 output is low. Pin 4 — EN — Receiver Output Enable. Please refer to SP488 Truth Table (1). Pin 5 — RO 2 — Receiver 2 Output — If Re- ceiver 2 output is enabled, if RI 2A > RI2B by 200mV, Receiver 2 output is high. If Receiver 2 output is enabled, and if RI 2A < RI2B by 200mV, Receiver 2 output is low. SP488 RI1B RI1A RO1 EN RO2 RI2A RI2B GND VCC RI4B RI4A RO4 EN RO3 RI3A RI3B 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 1 4 3 2 SP489 RI1B RI1A RO1 EN1/EN2 RO2 RI2A RI2B GND VCC RI4B RI4A RO4 EN3/EN4 RO3 RI3A RI3B 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 1 4 3 2 PINOUT |
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Similar Description - SP488CT |
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