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MPC8377E Datasheet(PDF) 10 Page - Freescale Semiconductor, Inc |
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MPC8377E Datasheet(HTML) 10 Page - Freescale Semiconductor, Inc |
10 / 127 page MPC8377E PowerQUICC II Pro Processor Hardware Specifications, Rev. 8 10 Freescale Semiconductor 2.1.3 chip Output Driver Characteristics This table provides information on the characteristics of the output driver strengths. The values are preliminary estimates. 2.2 Power Sequencing The device requires its power rails to be applied in a specific sequence in order to ensure proper device operation. During the power ramp up, before the power supplies are stable and if the I/O voltages are supplied before the core voltage, there may be a period of time that all input and output pins will actively be driven and cause contention and excessive current. To avoid actively driving the I/O pins and to eliminate excessive current draw, apply the core voltages (VDD and AVDD) before the I/O voltages and assert PORESET before the power supplies fully ramp up. VDD and AVDD must reach 90% of their nominal value before GVDD, LVDD, and OVDD reach 10% of their value, see the following figure. I/O Table 4. Output Drive Capability Driver Type1 Output Impedance ( Ω) Supply Voltage Local bus interface utilities signals 45 LBVDD = 2.5 V, 3.3 V 40 LBVDD = 1.8 V PCI signals 25 OVDD = 3.3 V DDR1 signal 18 GVDD = 2.5 V DDR2 signal 18 GVDD = 1.8 V eTSEC 10/100/1000 signals 45 LVDD = 2.5 V, 3.3 V DUART, system control, I2C, JTAG, SPI, and USB 45 OVDD = 3.3 V GPIO signals 45 OVDD = 3.3 V Note: 1. Specialized SerDes output capabilities are described in the relevant sections of these specifications (such as PCI Express and SATA) |
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