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LTC3869 Datasheet(PDF) 9 Page - Linear Technology |
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LTC3869 Datasheet(HTML) 9 Page - Linear Technology |
9 / 50 page LTC3839 9 3839fa PIN FUNCTIONS PHASMD (Pin 1): Phase Selector Input. This pin determines the relative phases of channels and the CLKOUT signal. With zero phase being defined as the rising edge of TG1: Pulling this pin to SGND locks TG2 to 180°, and CLKOUT to 60°. Connecting this pin to INTVCC locks TG2 to 240° and CLKOUT to 120°. Floating this pin locks TG2 to 180° and CLKOUT to 90°. MODE/PLLIN (Pin 2): Operation Mode Selection or External Clock Synchronization Input. When this pin is tied to IN- TVCC, forced continuous mode operation is selected. Tying this pin to SGND allows discontinuous mode operation. When an external clock is applied at this pin, both chan- nels operate in forced continuous mode and synchronize to the external clock. CLKOUT (Pin 3): Clock Output of Internal Clock Genera- tor. Its output level swings between INTVCC and SGND. If clock input is present at the MODE/PLLIN pin, it will be synchronized to the input clock, with phase set by the PHASMD pin. If no clock is present at MODE/PLLIN, its frequency will be set by the RT pin. To synchronize other controllers, it can be connected to their MODE/PLLIN pins. SGND (Pins 4, 29): Signal Ground. All small-signal analog and compensation components should be connected to this ground. Connect both SGND pins to the exposed pad and PGND pin using a single PCB trace. RT (Pin 5): Clock Generator Frequency Programming Pin. Connect an external resistor from RT to SGND to program the switching frequency between 200kHz and 2MHz. An external clock applied to MODE/PLLIN should be within ±30% of this programmed frequency to ensure frequency lock. When the RT pin is floating, the frequency is internally set to be slightly under 200kHz. ITH (Pins 6): Current Control Threshold. This pin is the output of the error amplifier and the switching regulator’s compensation point. The current comparator threshold increases with this control voltage. The voltage ranges from 0V to 2.4V, with 0.8V corresponding to zero sense voltage (zero inductor valley current). TRACK/SS (Pin 7): External Tracking and Soft-Start Input. The LTC3839 regulates the feedback voltage (VOUTSENSE+ – VOUTSENSE–) to the smaller of 0.6V or the voltage on the TRACK/SS pin. An internal 1μA temperature-independent pull-up current source is connected to TRACK/SS pin. A capacitor to ground at this pin sets the ramp time to the final regulated output voltage. Alternatively, another voltage supply connected to this pin allows the output to track the other supply during start-up. VOUTSENSE+ (Pin 8): Differential Output Sense Amplifier (+) Input. Connect this pin to a feedback resistor divider between the positive and negative output capacitor ter- minals of VOUT. In nominal operation the LTC3839 will attempt to regulate the differential output voltage VOUT to 0.6V divided by the feedback resistor divider ratio. VOUTSENSE– (Pin 9): Differential Output Sense Amplifier (–) Input. Connect this pin to the negative terminal of the output load capacitor of VOUT. SENSE1+, SENSE2+ (Pin 10, Pin 31): Differential Current Sense Comparator (+) Inputs. The ITH pin voltage and controlled offsets between the SENSE+ and SENSE– pins set the current trip threshold. The comparator can be used for RSENSE sensing or inductor DCR sensing. For RSENSE sensing, Kelvin (4-wire) connect the SENSE+ pin to the (+) terminal of RSENSE. For DCR sensing, tie the SENSE+ pins to the connection between the DCR sense capacitor and sense resistor tied across the inductor. SENSE1–, SENSE2– (Pin 11, Pin 30): Differential Current Sense Comparator (–) Input. The comparator can be used for RSENSE sensing or inductor DCR sensing. For RSENSE sensing, Kelvin (4-wire) connect the SENSE– pin to the (–) terminal of RSENSE. For DCR sensing, tie the SENSE– pin to the DCR sense capacitor tied to the inductor VOUT node connection. These pins also function as output voltage sense pins for the top MOSFET on-time adjustment. The impedance looking into these pins is different from the SENSE+ pins because there is an additional 500k internal resistor from each of the SENSE– pins to SGND. DTR (Pin 12): Detect Load-Release Transient for Overshoot Reduction. When load current suddenly drops, if voltage on this DTR pin drops below half of INTVCC, the bottom gate (BG) could turn off, allowing the inductor current to drop to zero faster, thus reducing the VOUT overshoot. (Refer to Load-Release Transient Detection in the Applications Information section for more details.) An internal 5μA current source pulls this pin toward INTVCC. To disable the DTR feature, simply tie the DTR pin to INTVCC. |
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