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LTC3625 Datasheet(PDF) 4 Page - Linear Technology |
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LTC3625 Datasheet(HTML) 4 Page - Linear Technology |
4 / 16 page LTC3226 4 3226fa ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating junction temperature range, otherwise specifications are at TA = 25°C (Note 3). VIN = 3.3V, VCPO = 5V, VOUT = 3.3V, VMID = 1/2 VCPO unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS LDO Minimum CPO Voltage for LDO Operation 2.4 V VLDO_FB LDO FB Servo Voltage IVOUT = 1mA l 0.76 0.8 0.82 V Load Regulation ΔVLDO_FB/ΔIOUT 1mA < IVOUT < 2A 2.7 mV/A LDO FET RDS(ON) VCPO = 3.6V 200 mΩ ILDO_FB(LEAK) LDO_FB Input Leakage Current VLDO_FB = 0.9V l –60 60 nA ILIM LDO Current Limit 24 A RST_FB, RST VRST_FB(TH) RST_FB Threshold (Falling Edge) l 0.72 0.74 0.76 V VRST_FB(HYS) RST_FB Hysteresis 20 mV IRST_FB(LEAK) RST_FB Input Leakage Current VRST_FB = 0.9V l –50 50 nA RST Output Low Voltage ISINK = 5mA 65 mV RST High Impedance Leakage Current VRST = 5V l 1μA RST Delay (RST_FB Rising) 290 ms Power-Fail Comparator VPFI(TH) PFI Input Threshold (Falling Edge) l 1.175 1.2 1.225 V VPFI(HYS) PFI input Hysteresis 20 mV IPFI(LEAK) PFI Input Leakage Current VPFI = 0.5V l –50 50 nA PFO Output Low Voltage ISINK = 5mA 65 mV IPFO(LEAK) PFO High Impedance Leakage Current VPFO = 5V l 1μA PFI Delay to PFO (PFI Falling) 0.5 μs EN_CHG VIH Input High Voltage l 1.3 V VIL Input Low Voltage l 0.4 V IIH Input High Current l –1 1 μA IIL Input Low Current l –1 1 μA Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: Failure to solder the exposed backside of the package to the PC board ground plane will result in a thermal resistance much greater than 58.7°C/W. Note 3: The LTC3226 is tested under pulsed load conditions such that TA ≈ TJ. The LTC3226E is guaranteed to meet specifications from 0°C to 85°C junction temperature. Specifications over the –40°C to 125°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LTC3226I is guaranteed over the full –40°C to 125°C operating junction temperature range. The junction temperature, TJ, is calculated from the ambient temperature, TA, and power dissipation, PD, according to the formula: TJ = TA + (PD • 58.7°C/W) Note that the maximum ambient temperature consistent with these specifications is determined by specific operating conditions in conjunction with board layout, the rated thermal package thermal resistance and the environmental factor. Note 4: Output not in regulation; ROL = (2 • VIN – VCPO)/ICPO. |
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