 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
UCC28070APW Datasheet(PDF) 32 Page - Texas Instruments |
|
|
||||||||||||||||||||||||||||||
UCC28070APW Datasheet(HTML) 32 Page - Texas Instruments |
|
|
32 / 43 page  0 2 2 avg Cout avg pk avg avg LF Pin X Pin v Vout Vout f Cout p ´ = = ´ ´ ´ 2 3 2 64 2 LF rd avg LF OV ( f ) mv R avg k mV Vout f Cout Z g k Pin p ´ ´ ´ ´ = ´ ´ 2 3 2 64 2 mv R avg rd avg LF g k Pin Cpv k mV Vout ( f ) Cout p ´ ´ = ´ ´ ´ ´ ( ) 1 avg Cout VXO BST VEA R mv Cpv R VAO avg Pin X Tv( f ) G G k g X k V Vout æ ö ´ = ´ ´ = ´ ´ ´ = ç ÷ ç ÷ D ´ è ø ( ) 2 2 2 mv R avg VXO VAO avg g k Pin f V Vout Cpv Cout p ´ ´ = D ´ ´ ´ ´ 1 2 VXO Rzv f Cpv p = ´ 10 10 2 VXO Czv Cpv f Rzv p = » ´ ´ UCC28070A SLUSAW0 – MARCH 2012 www.ti.com The output capacitor maximum low-frequency zero-to-peak ripple voltage is closely approximated by: (27) where PIN(avg) is the total maximum input power of the interleaved-PFC pre-regulator, VOUT(avg) is the average output voltage and COUT is the output capacitance. VSENSEpk = vopkxkR, where kR is the gain of the resistor-divider network on VSENSE. Thus, for k3rd% of allowable 3rd-harmonic distortion on the input current attributable to the VAO ripple, (28) This impedance on VAO is set by a capacitor (Cpv), where CPV = 1/( 2πf2LFxZOV(f2LF)) therefore, (29) The voltage-loop unity-gain cross-over frequency (fVXO) may now be solved by setting the open-loop gain equal to 1: (30) so, (31) The “zero-resistor” (RZV) from the zero-placement network of the compensation may now be calculated. Together with CPV, RZV sets a pole right at fVXO to obtain 45° phase margin at the cross-over. Thus, (32) Finally, a zero is placed at or below fVXO/6 with capacitor CZV to provide high gain at dc but with a breakpoint far enough below fVXO so as not to significantly reduce the phase margin. Choosing fVXO/10 allows one to approximate the parallel combination value of CZV and CPV as CZV, and solve for CZV simply as: (33) By using a spreadsheet or math program, CZV, RZV, and CPV may be manipulated to observe their effects on fVXO and phase margin and %-contribution to 3rd-harmonic distortion (see note below). Also, phase margin may be checked as PIN(avg) level and system parameter tolerances vary. NOTE The percent of 3rd-harmonic distortion calculated in this section represents the contribution from the f2LF voltage ripple on COUT only. Other sources of distortion, such as the current-sense transformer, the current synthesizer stage, even distorted VIN, etc., can contribute additional 3rd and higher harmonic distortion. 32 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s): UCC28070A |
Similar Part No. - UCC28070APW |
|
Similar Description - UCC28070APW |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
