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TPS3700DDCR Datasheet(PDF) 2 Page - Texas Instruments |
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TPS3700DDCR Datasheet(HTML) 2 Page - Texas Instruments |
2 / 19 page TPS3700 SBVS187B – FEBRUARY 2012 – REVISED APRIL 2012 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION(1) PRODUCT DESCRIPTION yyy is package designator TPS3700yyyz z is package quantity (1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or visit the device product folder at www.ti.com. ABSOLUTE MAXIMUM RATINGS (1) Over operating free-air temperature range, unless otherwise noted. VALUE MIN MAX UNIT VDD –0.3 +20 V Voltage(2) VOUTA, VOUTB –0.3 +20 V VINA+, VINB– –0.3 +7 V Current Output pin current 40 mA Operating junction, TJ –40 +125 °C Temperature Storage, Tstg –65 +150 °C Human body model (HBM) 2 kV Electrostatic discharge (ESD) rating(3) Charge device model (CDM) 500 V (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods my affect device reliability. (2) All voltages are with respect to network ground terminal. (3) ESD testing is performed according to the respective JESD22 JEDEC standard. THERMAL INFORMATION TPS3700 THERMAL METRIC(1) DDC (SOT23) UNITS 6 PINS θJA Junction-to-ambient thermal resistance 204.6 θJCtop Junction-to-case (top) thermal resistance 50.5 θJB Junction-to-board thermal resistance 54.3 °C/W ψJT Junction-to-top characterization parameter 0.8 ψJB Junction-to-board characterization parameter 52.8 θJCbot Junction-to-case (bottom) thermal resistance N/A (1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. 2 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s): TPS3700 |
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