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TPS7A7100RGWT Datasheet(PDF) 2 Page - Texas Instruments |
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TPS7A7100RGWT Datasheet(HTML) 2 Page - Texas Instruments |
2 / 29 page TPS7A7100 SBVS189C – MARCH 2012 – REVISED MAY 2012 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION(1) PRODUCT Description TPS7A7100yyyz YYY is package designator. Z is package quantity. (1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the device product folder at www.ti.com. ABSOLUTE MAXIMUM RATINGS (1) Over operating free-air temperature range (unless otherwise noted). VALUE MIN MAX UNIT IN, PG, EN –0.3 +7.0 V Voltage SS, FB, SNS, OUT –0.3 VIN + 0.3 (2) V 50mV, 100mV, 200mV, 400mV, 800mV, 1.6V –0.3 VOUT + 0.3 V OUT Internally limited A Current PG (sink current into IC) 5 mA Operating virtual junction, TJ –55 +150 °C Temperature Storage, Tstg –55 +150 °C Human body model (HBM, JESD22-A114A) 2 kV Electrostatic Discharge Rating(3) Charged device model (CDM, JESD22-C101B.01) 500 V (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated is not implied. Exposure to absolute- maximum-rated conditions for extended periods may affect device reliability. (2) The absolute maximum rating is VIN + 0.3 V or +7.0 V, whichever is smaller. (3) ESD testing is performed according to the respective JESD22 JEDEC standard. 2 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated |
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