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TLV70229DSET Datasheet(PDF) 11 Page - Texas Instruments |
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TLV70229DSET Datasheet(HTML) 11 Page - Texas Instruments |
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11 / 27 page  P =(V V ) I - ´ D IN OUT OUT TLV702xx www.ti.com SLVSAG6B – SEPTEMBER 2010 – REVISED FEBRUARY 2011 DROPOUT VOLTAGE The internal protection circuitry of the TLV702xx has been designed to protect against overload conditions. The TLV702xx uses a PMOS pass transistor to It was not intended to replace proper heatsinking. achieve low dropout. When (VIN – VOUT) is less than Continuously running the TLV702xx into thermal the dropout voltage (VDO), the PMOS pass device is shutdown degrades device reliability. in the linear region of operation and the input-to-output resistance is the RDS(ON) of the PMOS POWER DISSIPATION pass element. VDO scales approximately with output current because the PMOS device behaves as a The ability to remove heat from the die is different for resistor in dropout. each package type, presenting different considerations in the printed circuit board (PCB) As with any linear regulator, PSRR and transient layout. The PCB area around the device that is free response are degraded as (VIN – VOUT) approaches of other components moves the heat from the device dropout. This effect is shown in Figure 15 in the to the ambient air. Typical Characteristics section. Thermal performance data for TLV702xx were TRANSIENT RESPONSE gathered using the TLV700 evaluation module (EVM), a 2-layer board with two ounces of copper per side. As with any regulator, increasing the size of the The dimensions and layout for the SOT23-5 (DBV) output capacitor reduces over-/undershoot magnitude EVM are shown in Figure 25 and Figure 26. but increases the duration of the transient response. Corresponding thermal performance data are given in Table 1. Note that this board has provision for UNDERVOLTAGE LOCKOUT (UVLO) soldering not only the SOT23-5 package on the bottom layer, but also the SC-70 package on the top The TLV702xx uses an undervoltage lockout circuit to layer. The dimensions and layout of the SON-6 (DSE) keep the output shut off until internal circuitry is EVM is shown in Figure 27 and Figure 28. operating properly. Corresponding thermal performance data is again given in Table 1. Using heavier copper increases the THERMAL INFORMATION effectiveness in removing heat from the device. The Thermal protection disables the output when the addition of plated through-holes to heat-dissipating junction temperature rises to approximately +165 °C, layers also improves heatsink effectiveness. allowing the device to cool. When the junction Power dissipation depends on input voltage and load temperature cools to approximately +145 °C, the conditions. Power dissipation (PD) is equal to the output circuitry is again enabled. Depending on power product of the output current and the voltage drop dissipation, thermal resistance, and ambient across the output pass element, as shown in temperature, the thermal protection circuit may cycle Equation 2. on and off. This cycling limits the dissipation of the regulator, protecting it from damage as a result of (2) overheating. PACKAGE MOUNTING Any tendency to activate the thermal protection circuit indicates excessive power dissipation or an Solder pad footprint recommendations for the inadequate heatsink. For reliable operation, junction TLV702xx are available from the Texas Instruments temperature should be limited to +125 °C maximum. web site at www.ti.com. The recommended land pattern for the DBV and DSE packages are shown in To estimate the margin of safety in a complete design Figure 29 and Figure 30, respectively. (including heatsink), increase the ambient temperature until the thermal protection is triggered; use worst-case loads and signal conditions. Table 1. EVM Dissipation Ratings PACKAGE RθJA TA < +25°C TA = +70°C TA = +85°C DBV 200 °C/W 500mW 275mW 200mW DSE 180 °C/W 555mW 305mW 222mW © 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback 11 |
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