TLV717xx

TLV717xxP

SBVS176A – OCTOBER 2011 – REVISED APRIL 2012

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This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

PRODUCT

TLV717xx(x)Pyyyz

XX(X) is the nominal output voltage. For output voltages with a resolution of 100 mV, two

digits are used in the ordering number; otherwise, three digits are used (for example, 28 =

2.8 V; 475 = 4.75 V).

P is optional; devices with P have an LDO regulator with an active output discharge.

YYY is the package designator.

Z is the package quantity. R is for reel (3000 pieces), T is for tape (250 pieces).

(1)

For the most current package and ordering information see the Package Option Addendum at the end of this document, or visit the

device product folder on www.ti.com.

ABSOLUTE MAXIMUM RATINGS

(1)

VALUE

MIN

MAX

UNIT

–0.3

6.0

V

Voltage

–0.3

V

–0.3

6.0

V

Current

Internally limited

Output short-circuit duration

Indefinite

See Thermal Information table

–55

+150

°C

Temperature

–55

+150

°C

Human body model (HBM)

2000

V

Electrostatic discharge (ESD) ratings

Charged device model (CDM)

500

V

(1)

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated is not implied. Exposure to absolute-

maximum rated conditions for extended periods may affect device reliability.

THERMAL INFORMATION

TLV717xx

TLV717xxP

UNITS

DQN

4 PINS

Junction-to-ambient thermal resistance

393.3

Junction-to-case(top) thermal resistance

140.3

Junction-to-board thermal resistance

330

°C/W

Junction-to-top characterization parameter

6.5

Junction-to-board characterization parameter

329

Junction-to-case(bottom) thermal resistance

147.5

(1)

For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

2

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Product Folder Link(s): TLV717xx TLV717xxP