SN65LVPE502CP

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SLLSE79B

– MARCH 2011 – REVISED FEBRUARY 2012

Electrical Idle Support

Electrical idle support is needed for low frequency periodic signaling (LFPS) used in USB 3.0 side band

communication. A link is in an electrical idle state when the TX

± voltage is held at a steady constant value like

the common mode voltage. LVPE502CP detects an electrical idle state when RX

± voltage at the device pin falls

below VRX_LFPS_DIFFp-p min. After detection of an idle state in a given channel the device asserts electrical

idle state in its corresponding TX. When RX

± voltage exceeds VRX_LFPS_DIFFp-p max normal operation is

restored and output start passing input signal. Electrical idle exit and entry time is speccified at

< 6ns.

TYPICAL EYE DIAGRAM AND PERFORMANCE CURVES

Measurement equipment details:

•

Generator (source) LeCroy PERT3,

•

Signal: 5Gbps, 1000mVp-p, 3.5 dB De-Emphasis

•

Tj and Dj measurements based on CP0 (USB 3 compliance pattern) which is D0.0 or logical idle with SKP

sequences removed

•

Rj measurements based on CP1 or D10.2 symbol containing alternating 0s and 1s at Nyquist frequency

•

Oscilloscope (Sink) LeCroy 25GHz Real Time Oscilloscope

•

LeCroy QualiPHY software used to measure jitter and collect compliance eye diagrams

Device Operating Conditions: VCC = 3.3 V, Temp = 25

°C, EQx/DEx/OSx set to their default value when not

mentioned

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© 2011–2012, Texas Instruments Incorporated

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