DRV8836

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SLVSB17 – MARCH 2012

FUNCTIONAL DESCRIPTION

Bridge Control

Two control modes are available in the DRV8836: IN/IN mode, and PHASE/ENABLE mode. IN/IN mode is

selected if the MODE pin is driven low or left unconnected; PHASE/ENABLE mode is selected if the MODE pin is

driven to logic high. The following tables show the logic for these modes.

Table 2. IN/IN MODE

FUNCTION

MODE

xIN1

xIN2

xOUT1

xOUT2

(DC MOTOR)

0

0

0

Z

Z

Coast

0

0

1

L

H

Reverse

0

1

0

H

L

Forward

0

1

1

L

L

Brake

Table 3. PHASE/ENABLE MODE

FUNCTION

MODE

xENABLE

xPHASE

xOUT1

xOUT2

(DC MOTOR)

1

0

X

L

L

Brake

1

1

1

L

H

Reverse

1

1

0

H

L

Forward

Sleep Mode

If the nSLEEP pin is brought to a logic-low state, the DRV8836 will enter a low-power sleep mode. In this state

all unnecessary internal circuitry is powered down.

Power Supplies and Input Pins

There is a weak pulldown resistor (approximately 100 k

Ω) to ground on the input pins.

Protection Circuits

The DRV8836 is fully protected against undervoltage, overcurrent and overtemperature events.

Overcurrent Protection (OCP)

An analog current limit circuit on each FET limits the current through the FET by removing the gate drive. If this

analog current limit persists for longer than the OCP time, all FETs in the H-bridge will be disabled. After

approximately 1 ms, the bridge will be re-enabled automatically.

Overcurrent conditions on both high and low side devices; i.e., a short to ground, supply, or across the motor

winding will all result in an overcurrent shutdown.

Thermal Shutdown (TSD)

If the die temperature exceeds safe limits, all FETs in the H-bridge will be disabled. Once the die temperature

has fallen to a safe level operation will automatically resume.

Undervoltage Lockout (UVLO)

If at any time the voltage on the VCC pins falls below the undervoltage lockout threshold voltage, all circuitry in

the device will be disabled, and internal logic will be reset. Operation will resume when VCC rises above the

UVLO threshold.

Copyright © 2012, Texas Instruments Incorporated

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Product Folder Link(s): DRV8836