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MAX17044X+ Datasheet(PDF) 3 Page - Maxim Integrated Products |
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MAX17044X+ Datasheet(HTML) 3 Page - Maxim Integrated Products |
3 / 14 page Compact, Low-Cost 1S/2S Fuel Gauges with Low-Battery Alert 3 Note 1: All voltages are referenced to GND. Note 2: SDA, SCL = GND; QSTRT, ALRT idle. Note 3: The MAX17043/MAX17044 enter Sleep mode 1.75s to 2.5s after (SCL < VIL) AND (SDA < VIL). Note 4: Time to enter sleep after Sleep command is sent. Time to exit sleep on rising edge of SCL or SDA. Note 5: fSCL must meet the minimum clock low time plus the rise/fall times. Note 6: The maximum tHD:DAT has only to be met if the device does not stretch the low period (tLOW) of the SCL signal. Note 7: This device internally provides a hold time of at least 75ns for the SDA signal (referred to the VIHMIN of the SCL signal) to bridge the undefined region of the falling edge of SCL. Note 8: Filters on SDA and SCL suppress noise spikes at the input buffers and delay the sampling instant. Note 9: CB—total capacitance of one bus line in pF. Note 10: Applies to 8-pin TDFN-EP package type only. PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS SCL Clock Frequency fSCL (Note 5) 0 400 kHz Bus Free Time Between a STOP and START Condition tBUF 1.3 µs Hold Time (Repeated) START Condition tHD:STA (Note 5) 0.6 µs Low Period of SCL Clock tLOW 1.3 µs High Period of SCL Clock tHIGH 0.6 µs Setup Time for a Repeated START Condition tSU:STA 0.6 µs Data Hold Time tHD:DAT (Notes 6, 7) 0 0.9 µs Data Setup Time tSU:DAT (Note 6) 100 ns Rise Time of Both SDA and SCL Signals tR 20 + 0.1CB 300 ns Fall Time of Both SDA and SCL Signals tF 20 + 0.1CB 300 ns Setup Time for STOP Condition tSU:STO 0.6 µs Spike Pulse Widths Suppressed by Input Filter tSP (Note 8) 0 50 ns Capacitive Load for Each Bus Line CB (Note 9) 400 pF SCL, SDA Input Capacitance CBIN 60 pF ELECTRICAL CHARACTERISTICS: 2-WIRE INTERFACE (2.5V ≤ VDD ≤ 4.5V, TA = -20°C to +70°C.) |
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