Integrated Charger, Dual Main Step-Down

Controllers, and Dual LDO Regulators

______________________________________________________________________________________ 11

ELECTRICAL CHARACTERISTICS (continued)

otherwise noted.) (Note 4)

and a 500pF capacitor from DH to LX to simulate external MOSFET gate capacitance. Actual in-circuit times may be dif-

ferent due to MOSFET switching speeds.

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

INPUT SOURCE-CURRENT REGULATION

Input Source-Current Limit

Threshold

58.5

61.5

mV

-2.5

+2.5

%

CSSP/CSSN Input-Voltage Range

5

26

V

IINP Current-Sense Amplifier

Voltage Gain

59.9

60.1

V/V

IINP Output-Voltage Range

0

4

V

IINP Accuracy

-2

+2

%

-3

+3

-4

+4

IINP Gain Error

-1.5

+1.5

%

IINP Offset Error

-0.65

+0.65

mV

ACIN, ACOK, AND ACOV

ACOK Detect Threshold

Measured at ACIN rising, hysteresis = 40mV

(typ)

1.47

1.53

V

-2

+2

%

ACOV Detect Threshold

Measured at ACIN rising, hysteresis = 40mV

(typ)

2.05

2.15

V

-2.38

+2.38

%

ACOK Sink Current

1

mA

ADAPTER PRESENT DETECTION

Adapter Absence Detect

Threshold

0

200

mV

Adapter Detect Threshold

300

600

mV

CHARGE-PUMP MOSFET DRIVER

PDSL Gate-Driver Output

Voltage High

5.3

V