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SDA 5649 SDA 5649X Semiconductor Group 46 Pin Definitions and Functions Pin No. P-DIP-14-3 Pin No. P-DSO-20-1 Symbol Function 1 V SS Ground (0 V) 1 V SSA Analog ground (0 V) 2 V SSD Digital ground (0 V) 3 N.C. Not connected 2 4 SCL Serial clock input of I2C-Bus. 3 5 SDA Serial data input of I2C-Bus. 4 6 CS0 Chip select input determining the I2C-Bus addresses: 20H / 21H, when pulled low 22H / 23H, when pulled high. 5 7 VCS Video Composite Sync output from sync slicer used for PLL based clock generation. 8 N.C. Not connected 6 9 DAVN Data available output active low, when PDC/VPS data is received. 7 10 EHB Output signaling the presence of the first field active high. 8 11 TI Test input; activates test mode when pulled high. connect to ground for operating mode. 9 12 PD1 Phase detector/charge pump output of data PLL (DAPLL). 13 N.C. Not connected 10 14 PD2/ VCO2 Connector of the loop filter for the SYSPLL. 11 15 VCO1 Input to the voltage controlled oscillator #1 of the DAPLL. 12 16 I REF Reference current input for the on-chip analog circuit. 13 17 CVBS Composite video signal input. 18 N.C. Not connected 14 V DD Positive supply voltage (+ 5 V nom.). 19 V DDD Positive supply voltage for the digital circuits (+ 5 V nom.). 20 V DDA Positive supply voltage for the analog circuits (+ 5 V nom.). |
