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SDA5642-6X Datasheet(PDF) 10 Page - Siemens Semiconductor Group

Part # SDA5642-6X
Description  VPS-Decoder
Download  27 Pages
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Manufacturer  SIEMENS [Siemens Semiconductor Group]
Direct Link  http://www.siemens.com/
Logo SIEMENS - Siemens Semiconductor Group

SDA5642-6X Datasheet(HTML) 10 Page - Siemens Semiconductor Group

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SDA 5642-6/X
Semiconductor Group
10
02.97
2.2.3
Write Mode
For writing to the VPS decoder, the following format has to be used:
Description of Data Transfer (Write Mode)
Step1:
In order to start a data transfer the master generates a Start Condition on the
bus by pulling the SDA line low while the SCL line is held high.
Step 2:
The bus master puts the chip address on the SDA line during the next eight
SCL pulses.
Step 3:
The master releases the SDA line during the ninth clock pulse. Thus the slave
can generate an acknowledge (AS) by pulling the SDA line to a low level.
Step 4:
The controller transmits the data byte to set the Control register
Step 5:
The slave acknowledges the reception of the byte.
Step 6:
The master concludes the data communication by generating a Stop
Condition.
The write mode is used to set the I2C-Bus control register which determines the
operating mode:
Control Register:
Default: All bits are set to 0 on power-up.
The bits T4 through T7 are used for test purposes and must not be changed for normal
operation by user software! (0 = normal operation)
You may write 00H, 01H, 02H, 03H, 04H, 05H, 06H, 07H, 08H, 09H, 0AH, 0BH, 0CH,
0DH, 0EH, 0FH to the register without efect. This enables the SDA 5642-6 to be used
for VPS decoding instead of the SDA 5050 or SDA 5649 without software problems.
Start
Chipaddress and Write Mode
AS
Byte to set Control Register
AS Stop
Bit Number: 76543210
T7
T6
T5
T4
T3
T2
T1
T0


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