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HMC988LP3E Datasheet(PDF) 2 Page - Hittite Microwave Corporation |
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HMC988LP3E Datasheet(HTML) 2 Page - Hittite Microwave Corporation |
2 / 22 page For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824 Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com Application Support: Phone: 978-250-3343 or apps@hittite.com 2 HMC988LP3E v01.0512 PROGRAMMABLE CLOCK DIVIDER AND DELAY DC - 4 GHz Table 1. Electrical Specifications unless otherwise specified: t = +25 °C. Current consumptions assumes fine adjustable delay is disabled. Phase noise degrades approximately 15 db if using fine delay adjustment. Parameter Conditions Min typ. Max units input Frequency range DC 4 GHz output Frequency range DC 4 GHz Divide ratios 1/2/4/8/16/32 Maximum Fine Delay Adjust Frequency DC 1 GHz VDD with on-chip regulator +3.7 +4.5 +5.5 V VDD bypass on-chip regulator +3.1 +3.3 +3.5 V input swing (lVPECl or ACc) +2 Vpp output swing (lVPECl) +1.8 (single-ended) Vpp +1.2 (diffiential) Vppd rise/Fall time (lVPECl out) 20%/80% 90 ps input Commom Mode DC bias +1.6 +2 +2.5 V output Common Mode Voltage +2 V Phase noise (100 MHz) [1] @ 100 MHz out @ 500 MHz out @ 1 GHz out @ 2 GHz out -170 -168 -166 -164 dbc/Hz Jitter Density [2] @ 100 MHz out @ 500 MHz out @ 1 GHz out @ 2 GHz out 7.12 1.8 1.13 2.84 asec/√Hz integrated Jitter [3] @ 100 MHz out @ 500 MHz out [4] @ 1 GHz out [4] @ 2 GHz out [4] 35 9 5 13 fsec FoM (Figure of Merit) -254 dbc/Hz Coarse Delay Adjustment range 1/2 to ∞ *t inPut input Cycles Fine Delay Adjustment range 60 steps of ~ 20 ps 300 1500 ps Fine Delay Adjjustment resolution 20 ps Fine Delay Adjustment step Count 60 Psrr [5] With regulator AM -70 -80 dbc PM -80 -92 dbc bypass regulator AM -40 -50 dbc PM -50 -70 dbc Current Consumption stand-by Current - Chip Disabled using regulator case 0.7 mA bypass regulator case 0.01 mA Mininum Current [6] 68 mA Additive Divider 16 21 mA Delay line Current 12 44 mA |
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