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ADP1053ACPZ-RL Datasheet(PDF) 40 Page - Analog Devices

Part # ADP1053ACPZ-RL
Description  3-Channel Digital
Download  84 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADP1053ACPZ-RL Datasheet(HTML) 40 Page - Analog Devices

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ADP1053
Data Sheet
Rev. A | Page 40 of 84
EEPROM PASSWORD
On power-up, the EEPROM is locked and protected from
accidental writes or erases. Only reads from Page 2 to Page 15
are allowed when the EEPROM is locked. Before any data can
be written (programmed) to the EEPROM, the EEPROM must
be unlocked for write access. After it is unlocked, the EEPROM
is opened for reading, writing, and erasing.
On power-up, Page 0 and Page 1 are also protected from read
access, and the EEPROM must first be unlocked to read these
pages.
Unlock the EEPROM
To unlock the EEPROM, perform two consecutive writes with
the correct password (default = 0xFF) using the EEPROM_
PASSWORD command (Command 0xD5). The EEPROM_
UNLOCKED flag (Bit 4 of Register 0xFEC3) is set to indicate
that the EEPROM is unlocked for write access.
Lock the EEPROM
To lock the EEPROM, write any byte other than the correct
password using the EEPROM_PASSWORD command
(Command 0xD5). The EEPROM_UNLOCKED flag is cleared
to indicate that the EEPROM is locked from write access.
Change the EEPROM Password
To change the EEPROM password, first write the correct password
using the EEPROM_PASSWORD command (Command 0xD5).
Immediately write the new password using the same command.
The password is now changed to the new password.
DOWNLOADING EEPROM SETTINGS TO INTERNAL
REGISTERS
Download User Settings to Registers
The user settings are stored in Page 1 of the EEPROM main
block. These settings are downloaded from the EEPROM into
the registers under the following conditions:
On power-up. The user settings are automatically down-
loaded into the internal registers, powering the part up in
a state previously saved by the user.
On execution of the RESTORE_USER_ALL command
(Command 0x16). This command allows the user to force
a download of the user settings from Page 1 of the EEPROM
main block into the internal registers.
Download Factory Default Settings to Registers
The factory default settings are stored in Page 0 of the EEPROM
main block. The factory default settings can be downloaded from
the EEPROM into the internal registers using the RESTORE_
DEFAULT_ALL command (Command 0x12).
When this command is executed, the EEPROM password is also
reset to the factory default setting of 0xFF.
SAVING REGISTER SETTINGS TO THE EEPROM
The register settings cannot be saved to the factory default set-
tings located in Page 0 of the EEPROM main block. This is to
prevent the user from accidentally overriding the factory trim
settings and default register settings.
Save Register Settings to User Settings
The register settings can be saved to the user settings located in
Page 1 of the EEPROM main block using the STORE_USER_ALL
command (Command 0x15). Before this command can be
executed, the EEPROM must first be unlocked for writing (see
the Unlock the EEPROM section).
After the register settings are saved to the user settings, any
subsequent power cycle automatically downloads the latest
stored user information from the EEPROM into the internal
registers.
Note that execution of the STORE_USER_ALL command auto-
matically performs a page erase to Page 1 of the EEPROM main
block, after which the register settings are stored in the EEPROM.
Therefore, it is important to wait at least 35 ms for the operation
to complete before executing the next PMBus command.
EEPROM CRC CHECKSUM
As a simple method of checking that the values downloaded
from the EEPROM are consistent with the internal registers,
a CRC checksum is implemented.
When the data from the internal registers is saved to the
EEPROM (Page 1 of the main block), the total number
of 1s from all the registers is counted and written into the
EEPROM as the last byte of information. This is called
the CRC checksum.
When the data is downloaded from the EEPROM into the
internal registers, a similar counter that sums all 1s from
the values loaded into the registers is saved. This value is
compared with the CRC checksum from the previous
upload operation.
If the values match, the download operation was successful. If
the values differ, the EEPROM download operation failed, and
the EEPROM_CRC fault flag is set (Bit 1 of Register 0xFEC2).
To read the EEPROM CRC checksum value, execute the
EEPROM_CRC_CHKSUM command (Command 0xD1).
This command returns the CRC checksum accumulated in
the counter during the download operation.
Note that the CRC checksum is an 8-bit cyclical accumulator
that wraps around to 0 when 255 is reached.


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