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ADIS16485AMLZ Datasheet(PDF) 4 Page - Analog Devices |
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ADIS16485AMLZ Datasheet(HTML) 4 Page - Analog Devices |
4 / 28 page ADIS16485 Data Sheet Rev. 0 | Page 4 of 28 Parameter Test Conditions/Comments Min Typ Max Unit FLASH MEMORY Endurance2 100,000 Cycles Data Retention3 TJ = 85°C 20 Years FUNCTIONAL TIMES4 Time until data is available Power-On, Start-Up Time TA = −40°C to +85°C 400 ± 160 ms Reset Recovery Time TA = −40°C to +85°C 400 ± 160 ms Sleep Mode Recovery Time 500 µs Flash Memory Update Time 900 ms Flash Memory Test Time 66 ms Automatic Self Test Time Using internal clock, 100 SPS 12 ms CONVERSION RATE 2.46 kSPS Initial Clock Accuracy 0.02 % Temperature Coefficient 40 ppm/°C Sync Input Clock5 0.7 2.4 kHz POWER SUPPLY, VDD Operating voltage range 3.0 3.6 V Power Supply Current6 Normal mode, VDD = 3.3 V, µ ± σ 197 mA Sleep mode, VDD = 3.3 V 12.2 mA Power-down mode, VDD = 3.3 V 37 µA POWER SUPPLY, VDDRTC Operating voltage range 3.0 3.6 V Real-Time Clock Supply Current Normal mode, VDDRTC = 3.3 V 13 µA 1 The digital I/O signals are driven by an internal 3.3 V supply, and the inputs are 5 V tolerant. 2 Endurance is qualified as per JEDEC Standard 22, Method A117, and measured at −40°C, +25°C, +85°C, and +125°C. 3 The data retention specification assumes a junction temperature (TJ) of 85°C as per JEDEC Standard 22, Method A117. Data retention lifetime decreases with TJ. 4 These times do not include thermal settling and internal filter response times, which may affect overall accuracy. 5 The device functions at clock rates below 0.7 kHz but at reduced performance levels. 6 Supply current transients can reach 450 mA for 400 µs during start-up and reset recovery. |
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