AD9633BCPZ-80 datasheet(9/40 Pages) AD

Part #	AD9633BCPZ-80

Description	Quad, 12-Bit, 80 MSPS/105 MSPS

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Manufacturer	AD [Analog Devices]

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9 / 40 page

Data Sheet

AD9633

Rev. 0 | Page 9 of 40

D0–A

D0+A

D1–A

D1+A

FCO–

BYTEWISE

MODE

FCO+

D0–A

D0+A

D1–A

D1+A

FCO–

DCO+

CLK+

CLK–

DCO–

FCO+

BITWISE

MODE

SDR

DDR

DCO+

DCO–

D08

N – 17

D06

N – 17

D04

N – 17

D02

N – 17

LSB

N – 17

D07

N – 16

D05

N – 16

D03

N – 16

D01

N – 16

MSB

N – 17

D07

N – 17

D05

N – 17

D03

N – 17

D04

N – 16

D03

N – 16

D02

N – 16

D01

N – 16

LSB

N – 16

D04

N – 17

D03

N – 17

D02

N – 17

D01

N – 17

LSB

N – 17

MSB

N – 17

D08

N – 17

D07

N – 17

D06

N – 17

D05

N – 17

tEH

tCPD

tFRAME

tFCO

tPD

tDATA

tLD

tEL

VIN±x

tA

N – 1

N

N + 1

D08

N – 16

D06

N – 16

D04

N – 16

D02

N – 16

D08

N – 15

D06

N – 15

D04

N – 15

D02

N – 15

LSB

N – 16

MSB

N – 16

D07

N – 15

D05

N – 15

D03

N – 15

MSB

N – 15

D01

N – 17

D04

N – 16

D03

N – 15

D02

N – 15

D01

N – 15

D04

N – 15

MSB

N – 16

D08

N – 16

D07

N – 16

D06

N – 16

MSB

N – 15

D08

N – 15

D07

N – 15

D06

N – 15

D05

N – 16

Figure 5. 10-Bit DDR/SDR, Two-Lane, 2× Frame Mode

D0–x

D0+x

FCO–

DCO+

CLK+

VIN±x

CLK–

DCO–

FCO+

D10

N – 17

MSB

N– 17

D9

N – 17

D8

N – 17

D7

N – 17

D6

N – 17

D5

N – 17

D4

N – 17

D3

N – 17

D2

N – 17

D1

N – 17

D0

N – 17

MSB

N – 16

D10

N – 16

tA

tDATA

tEH

tFCO

tFRAME

tPD

tCPD

tEL

N – 1

N

Figure 6. Wordwise DDR, One-Lane, 1× Frame, 12-Bit Output Mode

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