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6N135S1(TA)-V Datasheet(PDF) 7 Page - Everlight Electronics Co., Ltd |
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6N135S1(TA)-V Datasheet(HTML) 7 Page - Everlight Electronics Co., Ltd |
7 / 14 page 8 PIN DIP HIGH SPEED 1Mbit/s TRANSISTOR PHOTOCOUPLER Everlight Electronics Co., Ltd. 7 http://www.everlight.com Document No :DPC-0000112 Rev.1 October 4, 2011 6N135 6N136 EL450X series Note: *3 Common mode transient immunity in logic high level is the maximum tolerable (positive) dVcm/dt on the leading edge of the common mode pulse signal VCM, to assure that the output will remain in a logic high state (i.e., VO > 2.0V). Common mode transient immunity in logic low level is the maximum tolerable (negative) dVcm/dt on the trailing edge of the common mode pulse signal, VCM, to assure that the output will remain in a logic low state (i.e., VO < 0.8V). Figure 8 Switching Time Test Circuit & Waveform Figure 9 Transient Immunity Test Circuit & Waveform |
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