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IXDI602SIA Datasheet(PDF) 11 Page - Clare, Inc. |
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IXDI602SIA Datasheet(HTML) 11 Page - Clare, Inc. |
11 / 13 page IXD_602 R02 www.clare.com 11 5.4 Mechanical Dimensions 5.4.1 SIA (8-Pin SOIC) 5.4.2 SI (8-Pin Power SOIC with Exposed Metal Back) Recommended PCB Land Pattern Dimensions mm MIN / mm MAX (inches MIN / inches MAX) 1.30 / 1.75 (0.051 / 0.069) 0.10 / 0.25 (0.004 / 0.010) 4.80 / 5.00 (0.190 / 0.197) PIN 1 0.31 / 0.51 (0.012 / 0.020) 5.80 / 6.20 (0.228 / 0.244) 3.80 / 4.00 (0.150 / 0.157) 1.27 BSC (0.05 BSC) 0.40 / 1.27 (0.016 / 0.050) 0.10 / 0.25 (0.004 / 0.010) 0.25 / 0.50 x45º (0.010 / 0.020 x45º) 0º / 8º 1.27 (0.050) 5.40 (0.213) 1.55 (0.061) 0.60 (0.024) NOTE: Molded package conforms to JEDEC standard configuration MS-012 variation AA. Recommended PCB Land Pattern Dimensions mm MIN / mm MAX (inches MIN / inches MAX) NOTES: 1. Molded package conforms to JEDEC standard configuration MS-012 variation BA. 2. The exposed metal pad on the back of the SI package may be left floating or connected to GND. It is not suitable for carrying current. 1.30 / 1.75 (0.051 / 0.069) 0.03 / 0.10 (0.001 / 0.004) 4.80 / 5.00 (0.190 / 0.197) PIN 1 0.31 / 0.51 (0.012 / 0.020) 5.80 / 6.20 (0.228 / 0.244) 3.80 / 4.00 (0.150 / 0.157) 1.27 BSC (0.05 BSC) 0.40 / 1.27 (0.016 / 0.050) 0.10 / 0.25 (0.004 / 0.010) 0.25 / 0.50 x45º (0.010 / 0.020 x45º) 0º / 8º 2.29 / 2.79 (0.090 / 0.110) 3.30 / 3.81 (0.130 / 0.150) 1.27 (0.050) 5.40 (0.209) 1.55 (0.061) 0.60 (0.024) 2.75 (0.108) 3.80 (0.150) |
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