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AK4950 Datasheet(PDF) 17 Page - Asahi Kasei Microsystems |
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AK4950 Datasheet(HTML) 17 Page - Asahi Kasei Microsystems |
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17 / 106 page  [AK4950] MS1320-E-00 2011/10 - 17 - Parameter Symbol min typ max Unit Digital Audio Interface Timing; CL=100pF DMCLK Output Timing Period tSCK - 1/(64fs) - ns Rising Time tSRise - - 10 ns Falling Time tSFall - - 10 ns Duty Cycle dSCK 40 50 60 % Audio Interface Timing DMDAT Setup Time tSDS 50 - - ns DMDAT Hold Time tSDH 0 - - ns Power-down & Reset Timing PDN Pulse Width (Note 31) tPD 150 - - ns PMADL or PMADR “ ↑” to SDTO valid (Note 32) ADRST bit = “0” tPDV - 1059 - 1/fs ADRST bit = “1” tPDV - 267 - 1/fs Note 31. The AK4950 can be reset by the PDN pin = “L”. When restart the AK4950 after powered-down, set the PDN pin to “L” and change to “H” after a 10ms interval. Note 32. This is the count of LRCK “↑” from the PMADL or PMADR bit = “1”. |
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