MCM6226BB

2

MOTOROLA FAST SRAM

TRUTH TABLE

E1

E2

G

W

Mode

I/O Pin

Cycle

Current

H

X

X

X

Not Selected

High–Z

—

ISB1, ISB2

X

L

X

X

Not Selected

High–Z

—

ISB1, ISB2

L

H

H

H

Output Disabled

High–Z

—

ICCA

L

H

L

H

Read

Dout

Read

ICCA

L

H

X

L

Write

Din

Write

ICCA

H = High, L = Low, X = Don’t Care

Rating

Symbol

Value

Unit

Power Supply Voltage Relative to VSS

VCC

– 0.5 to 7.0

V

Voltage Relative to VSS for Any Pin

Except VCC

Vin, Vout

– 0.5 to VCC + 0.5

V

Output Current (per I/O)

Iout

± 20

mA

Power Dissipation

PD

1.0

W

Temperature Under Bias

Tbias

– 10 to + 85

°C

Operating Temperature

TA

0 to + 70

°C

Storage Temperature

Tstg

– 55 to + 150

°C

NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are

exceeded. Functional operation should be restricted to RECOMMENDED OPER-

ATING CONDITIONS. Exposure to higher than recommended voltages for

extended periods of time could affect device reliability.

DC OPERATING CONDITIONS AND CHARACTERISTICS

(VCC = 5.0 V ± 10%, TA = 0 to 70°C, Unless Otherwise Noted)

RECOMMENDED OPERATING CONDITIONS

Parameter

Symbol

Min

Max

Unit

Supply Voltage (Operating Voltage Range)

VCC

4.5

5.5

V

Input High Voltage

VIH

2.2

VCC + 0.3**

V

Input Low Voltage

VIL

– 0.5*

0.8

V

*VIL (min) = – 0.5 V dc; VIL (min) = – 2.0 V ac (pulse width ≤ 20 ns).

** VIH (max) = VCC + 0.3 V dc; VIH (max) = VCC + 2 V ac (pulse width ≤ 20 ns).

DC CHARACTERISTICS AND SUPPLY CURRENTS

Parameter

Symbol

Min

Max

Unit

Input Leakage Current (All Inputs, Vin = 0 to VCC)

Ilkg(I)

—

± 1

µA

Output Leakage Current (E* = VIH, Vout = 0 to VCC)

Ilkg(O)

—

± 1

µA

AC Active Supply Current (Iout = 0 mA, all inputs =

MCM6226BB–15: tAVAV = 15 ns

VIL or VIH, VIL = 0, VIH ≥ 3 V, cycle time ≥ tAVAV min,

MCM6226BB–17: tAVAV = 17 ns

VCC = max)

MCM6226BB–20: tAVAV = 20 ns

MCM6226BB–25: tAVAV = 25 ns

MCM6226BB–35: tAVAV = 35 ns

ICCA

—

—

—

—

—

195

180

165

150

130

mA

AC Standby Current (VCC = max, E* = VIH, f = fmax)

MCM6226BB–15: tAVAV = 15 ns

MCM6226BB–17: tAVAV = 17 ns

MCM6226BB–20: tAVAV = 20 ns

MCM6226BB–25: tAVAV = 25 ns

MCM6226BB–35: tAVAV = 35 ns

ISB1

—

—

—

—

—

45

40

35

30

25

mA

CMOS Standby Current (E*

≥ VCC – 0.2 V, Vin ≤ VSS + 0.2 V

or

≥ VCC – 0.2 V, VCC = max, f = 0 MHz)

ISB2

—

5

mA

Output Low Voltage (IOL = + 8.0 mA)

VOL

—

0.4

V

Output High Voltage (IOH = – 4.0 mA)

VOH

2.4

—

V

*E1 and E2 are represented by E in this data sheet. E2 is of opposite polarity to E1.

This device contains circuitry to protect the

inputs against damage due to high static volt-

ages or electric fields; however, it is advised

that normal precautions be taken to avoid

application of any voltage higher than maxi-

mum rated voltages to these high–impedance

circuits.

This CMOS memory circuit has been de-

signed to meet the dc and ac specifications

shown in the tables, after thermal equilibrium

has been established. The circuit is in a test

socket or mounted on a printed circuit board

and transverse air flow of at least 500 linear feet

per minute is maintained.