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HYB514100BJ-50 Datasheet(PDF) 6 Page - Siemens Semiconductor Group |
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HYB514100BJ-50 Datasheet(HTML) 6 Page - Siemens Semiconductor Group |
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6 / 21 page  HYB 514100BJ-50/-60 4M × 1 DRAM Semiconductor Group 6 1998-10-01 CAS to RAS precharge time t CRP 5– 5 – ns Transition time (rise and fall) t T 3 50 3 50 ns 7 Refresh period t REF – 16 – 16 ms Read Cycle Access time from RAS t RAC – 50 – 60 ns 8, 9 Access time from CAS t CAC – 13 – 15 ns 8, 9 Access time from column address t AA – 25 – 30 ns 8, 10 Column addr. to RAS lead time t RAL 25 – 30 – ns Read command setup time t RCS 0– 0 – ns Read command hold time t RCH 0– 0 – ns 11 Read command hold time referenced to RAS t RRH 0– 0 – ns 11 CAS to output in low–Z t CLZ 0– 0 – ns 8 Output buffer turn-off delay t OFF 0 13 0 15 ns 12 Write Cycle Write command hold time t WCH 8 – 10 – ns Write command pulse width t WP 8 – 10 – ns Write command setup time t WCS 0– 0 – ns 13 Write command to RAS lead time t RWL 13 – 15 – ns Write command to CAS lead time t CWL 13 – 15 – ns Data setup time t DS 0– 0 – ns 14 Data hold time t DH 10 – 10 – ns 14 Read-Modify-Write Cycle Read-write cycle time t RWC 115 – 130 – ns RAS to WE delay time t RWD 50 – 60 – ns 13 CAS to WE delay time t CWD 13 – 15 – ns 13 Column address to WE delay time t AWD 25 – 30 – ns 13 AC Characteristics (cont’d) 5, 6 T A = 0 to 70 °C, VCC =5V ±10%, tT =5ns Parameter Symbol Limit Values Unit Note -50 -60 min. max. min. max. |
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