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Q67100-Q1056 Datasheet(PDF) 8 Page - Siemens Semiconductor Group |
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Q67100-Q1056 Datasheet(HTML) 8 Page - Siemens Semiconductor Group |
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8 / 22 page  Semiconductor Group 40 HYB 511000BJ/BJL-50/-60/-70 1 M × 1-DRAM RAS to column address delay time 12) t RAD 15 25 15 30 15 35 ns CAS to RAS precharge time t CRP 5– 5– 5– ns CAS precharge time (fast page mode) t CP 10 – 10 – 10 – ns Row address setup time t ASR 0– 0– 0– ns Row address hold time t RAH 10 – 10 – 10 – ns Column address setup time t ASC 0– 0– 0– ns Column address hold time t CAH 15 – 15 – 15 – ns Column address to RAS lead time t RAL 25 – 30 – 35 – ns Read command setup time t RCS 0– 0– 0– ns Read command hold time 8) t RCH 0– 0– 0– ns Read command hold time referenced to RAS 8) t RRH 0– 0– 0– ns Write command hold time t WCH 10 – 10 – 15 – ns Write command pulse width t WP 10 – 10 – 15 – ns Write command to RAS lead time t RWL 15 – 15 – 20 – ns Write command to CAS lead time t CWL 15 – 15 – 20 – ns Data setup time 9) t DS 0– 0– 0– ns Data hold time 9) t DH 10 – 15 – 15 – ns Refresh period t REF –8 –8 –8 ms Refresh period for L-version only t REF –64 – 64 –64 ms AC Characteristics (cont’d) 4) 13) T A = 0 to 70 ˚C; VCC = 5 V ± 10 %; tT = 5 ns Parameter Symbol Limit Values Unit -50 -60 -70 min. max. min. max. min. max. |
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