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HYB511000BJ- Datasheet(PDF) 1 Page - Siemens Semiconductor Group |
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HYB511000BJ- Datasheet(HTML) 1 Page - Siemens Semiconductor Group |
1 / 22 page Semiconductor Group 33 01.95 • 1 048 576 words by 1-bit organization • Fast access and cycle time 50 ns access time 95 ns cycle time (-50 version) 60 ns access time 130 ns cycle time (-60 version) 70 ns access time 130 ns cycle time (-70 version) • Fast page mode cycle time 35 ns (-50 version) 40 ns (-60 version) 45 ns (-70 version) • Low power dissipation max. 495 mW active (-50 version) max. 440 mW active (-60 version) max. 385 mW active (-70 version) max. 5.5 mW standby max. 1.1 mW standby for L-version Ordering Information Type Ordering Code Package Description HYB 511000BJ-50 Q67100-Q1056 P-SOJ-26/20-1 DRAM (access time 50 ns) HYB 511000BJ-60 Q67100-Q518 P-SOJ-26/20-1 DRAM (access time 60 ns) HYB 511000BJ-70 Q67100-Q519 P-SOJ-26/20-1 DRAM (access time 70 ns) HYB 511000BJL-50 on request P-SOJ-26/20-1 DRAM (access time 50 ns) HYB 511000BJL-60 Q67100-Q526 P-SOJ-26/20-1 DRAM (access time 60 ns) HYB 511000BJL-70 Q67100-Q527 P-SOJ-26/20-1 DRAM (access time 70 ns) 1 M × 1-Bit Dynamic RAM Low Power 1 M × 1-Bit Dynamic RAM Advanced Information HYB 511000BJ-50/-60/-70 HYB 511000BJL-50/-60/-70 • Single + 5 V ( ± 10 %) supply with a built-in V BB generator • Output unlatched at cycle end allows two- dimensional chip selection • Common I/O capability using “early write” operation • Read-modify-write, CAS-before-RAS refresh, RAS-only refresh, hidden-refresh, fast page mode capability and test mode capability • All inputs, outputs and clocks TTL-compatible • 512 refresh cycles/8 ms 512 refresh cycles/64 ms for L-version only • Plastic Packages: P-SOJ-26/20-1 |
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