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MIC502BM Datasheet(PDF) 4 Page - Micrel Semiconductor |
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MIC502BM Datasheet(HTML) 4 Page - Micrel Semiconductor |
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4 / 15 page  Micrel, Inc. MIC502 November 2006 4 M9999-112206 Symbol Parameter Condition Min Typ Max Units Overtemperature Fault Output VOL Active (Low) Output Voltage IOL = 2mA 0.3 V IOH Off-State Leakage V/OTF = VDD 1 µA Notes: 1. Exceeding the absolute maximum rating may damage the device. 2. The device is not guaranteed to function outside its operating rating. 3. Devices are ESD sensitive. Handling precautions recommended. 4. Part is functional over this VDD range; however, it is characterized for operation at 4.5V ≤ VDD ≤ 5.5V and 10.8V ≤ VDD ≤ 13.2V ranges. These ranges correspond to nominal VDD of 5V and 12V, respectively. 5. Guaranteed by design. 6. VOT is guaranteed by design to always be higher than VPWM(max). 7. Logic time base and PWM frequency. For other values of CF, f(Hz) = 30Hz C F 0.1 µ , where C is in µF. Timing Diagrams VOH VOL 50% 80% 40% 0% 100% 40% 70% tSTARTUP tPWM Output Duty Cycle AB C D E F G 0.7VDD 0.3VDD 0.3VDD VT1 VT2 VSLP 100% 0% 30% 70% 80% 50% 40% 40% Input Signal Range VOT VIH VIL 0V VOH VOL VOUT VOTF 0V 0V Figure 1. Typical System Behavior Note A. Output duty-cycle is initially determined by VT1, as it is greater than VT2. Note B. PWM duty-cycle follows VT1 as it increases. Note C. VT1 drops below VT2. VT2 now determines the output duty-cycle. Note D. The PWM duty-cycle follows VT2 as it increases. Note E. Both VT1 and VT2 decrease below VSLP but above VIL. The device enters sleep mode. Note F. The PWM ‘wakes up’ because one of the control inputs (VT1 in this case) has risen above VWAKE. The startup timer is triggered, forcing OUT high for 64 clock periods. (VWAKE = VSLP + VHYST. See “Electrical Characteristics”). Note G. Following the startup interval, the PWM duty-cycle is the higher of VT1 and VT2. |
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