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SY10EL51

SY100EL51

Micrel, Inc.

M9999-121205

hbwhelp@micrel.com or (408) 955-1690

DESCRIPTION

s 475ps propagation delay

s 2.8GHz toggle frequency

s Internal 75K

s Available in 8-pin SOIC package

The SY10/100EL51 are differential clock D flip-flops

with reset. These devices are functionally similar to the

E151 devices, with higher performance capabilities. With

propagation delays and output transition times

significantly faster than the E151, the EL51 is ideally

suited for those applications which require the ultimate

in AC performance.

The reset input is an asynchronous, level triggered

signal. Data enters the master portion of the flip-flop

when the clock is LOW and is transferred to the slave,

and thus the outputs, upon a positive transition of the

clock. The differential clock inputs of the EL51 allow the

device to be used as a negative edge triggered flip-flop.

The differential input employs clamp circuitry to

conditions.

FEATURES

DIFFERENTIAL

CLOCK D FLIP-FLOP

PIN NAMES

Pin

Function

R

Reset Input

D

Data Input

CLK

Clock Input

Q

Data Output

SY10EL51

SY100EL51

D

R

CLK

Q

LL

Z

L

HL

Z

H

XH

X

L

NOTE:

1. Z = LOW-to-HIGH transition.

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Rev.: G

Amendment: /0

Issue Date:

December 2005