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SY100S314JZTR Datasheet(PDF) 1 Page - Micrel Semiconductor |
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SY100S314JZTR Datasheet(HTML) 1 Page - Micrel Semiconductor |
1 / 4 page 1 SY100S314 Micrel, Inc. M9999-060910 hbwhelp@micrel.com or (408) 955-1690 BLOCK DIAGRAM ■ Max.propagationdelayof900ps ■ Differentialoutputs ■ IEEmin.of–60mA ■ Extendedsupplyvoltageoption: VEE=–4.2Vto–5.5V ■ Voltageandtemperaturecompensationforimproved noiseimmunity ■ VBBoutputforsingle-endeduse ■MorethantwiceasfastasFairchild ■ FunctionandpinoutcompatiblewithFairchildF100K ■ Availablein28-pinPLCCpackage FEATURES DESCRIPTION The SY100S314 offers five differential line receivers with emitter follower outputs, designed for use in high-performance ECL systems. For single-ended operation, the VBB reference voltage is available. In the single-ended mode, the apparent input threshold of the true inputs is 30mV higher than the threshold of the complementary inputs. Common mode rejection of +1.0V is achieved through the use of active current sources. If both the true and complement inputs are at the same potential between VEE and VCC, then the complementary outputs will take on a logic HIGH state. Unlike the other members of the Micrel 300K family, the inputs on this device do not have pull-down resistors. SY100S314 QUINTDIFFERENTIAL LINERECEIVER Pin Function Da – De Data Inputs Da – De Inverting Data Inputs Oa – Oe Data Outputs Oa – Oe Complementary Data Outputs VEES VEE Substrate VCCA VCCO for ECL Outputs PINNAMES Rev.: I Amendment: /0 Issue Date: June 2010 |
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