Micrel, Inc.

SY56034AR

September 2008

3

M9999-093008-A

hbwhelp@micrel.com or (408) 955-1690

Pin Description

Pin Number

Pin Name

Pin Function

2,3

6,7

IN0, /IN0

IN1,/IN1

Differential Inputs: These input pairs are the differential signal inputs to the device.

internally terminates with 50

Ω to the VT pin.

1

8

VT0

VT1

Input Termination Center-Tap: Each side of the differential input pair terminates to a

VT pin. This pin provides a center-tap to a termination network for maximum

interface flexibility. An internal high impedance resistor divider biases VT to allow

input AC-coupling. For AC-coupling, bypass VT with a 0.1µF low ESR capacitor to

VCC. See “Interface Applications” subsection and Figure 2a.

4

5

SEL0

SEL1

These single-ended TTL/CMOS-compatible inputs select the inputs to the

crosspoint switch. Note that each of these inputs is internally connected to a 25k

Ω

pull-up resistor and will default to a logic HIGH state if left open.

10, 31

VCC

Positive Power Supply: Bypass with 0.1µF//0.01µF low ESR capacitors as close to

11,16,18,

23,25,30

VCCO

pins as possible. Supplies the output buffer.

9,17,24,32

GND,

Exposed pad

Ground: Exposed pad must be connected to a ground plane that is the same

potential as the ground pin.

29,28

27,26

22,21

20,19

15,14

13,12

Q0, /Q0

Q1, /Q1

Q2, /Q2

Q3, /Q3

Q4, /Q4

Q5, /Q5

CML Differential Output Pairs: Differential buffered copy of the selected input signal.

The output swing is typically 390mV. See “Interface Applications” subsection for

termination information. Output pairs Q0 to Q3 belong to Bank 1. Q4 and Q5 belong

to Bank 2.