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SY58608U Datasheet(PDF) 5 Page - Micrel Semiconductor

Part # SY58608U
Description  3.2Gbps Precision, 1:2 LVDS Fanout Buffer
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Manufacturer  MICREL [Micrel Semiconductor]
Direct Link  http://www.micrel.com
Logo MICREL - Micrel Semiconductor

SY58608U Datasheet(HTML) 5 Page - Micrel Semiconductor

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Micrel, Inc.
SY58608U
October 2006
5
M9999-102706-A
hbwhelp@micrel.com or (408) 955-1690
AC Electrical Characteristics
(8)
VCC = +2.5V ±5%, RL = 100
Ω across the output pairs, Input t
r/tf:
≤300ps; T
A = –40°C to +85°C,
unless otherwise stated.
Symbol
Parameter
Condition
Min
Typ
Max
Units
fMAX
Maximum Frequency
NRZ Data
3.2
4.25
Gbps
VOUT > 200mV
Clock
2
3
GHz
tPD
Propagation Delay
IN-to-Q
VIN: 100mV-200mV
170
280
420
ps
VIN: 200mV-800mV
130
200
300
ps
tSkew
Within Device Skew
Note 9
5
20
ps
Part-to-Part Skew
Note 10
135
ps
tJitter
Data
Random Jitter
Note 11
1
psRMS
Deterministic Jitter
Note 12
10
psPP
Clock
Cycle-to-Cycle Jitter
Note 13
1
psRMS
Total Jitter
Note 14
10
psPP
tr, tf
Output Rise/Fall Time
(20% to 80%)
At full output swing.
35
60
100
ps
Duty Cycle
Differential I/O
47
53
%
Notes:
8.
These high-speed parameters are Guaranteed by design and characterization.
9.
Within-device skew is measured between two different outputs under identical input transitions.
10. Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and no skew at the edges at the
respective inputs.
11. Random jitter is measured with a K28.7 pattern, measured at
≤ f
MAX.
12. Deterministic jitter is measured at 2.5Gbps with both K28.5 and 2
23–1 PRBS pattern.
13. Cycle-to-cycle jitter definition: the variation period between adjacent cycles over a random sample of adjacent cycle pairs. tJITTER_CC = Tn –Tn+1,
where T is the time between rising edges of the output signal.
14. Total jitter definition: with an ideal clock input frequency of
≤ f
MAX (device), no more than one output edge in 10
12 output edges will deviate by
more than the specified peak-to-peak jitter value.


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