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R5F5630EDDFB Datasheet(PDF) 5 Page - Renesas Technology Corp |
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R5F5630EDDFB Datasheet(HTML) 5 Page - Renesas Technology Corp |
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5 / 165 page  R01DS0060EJ0100 Rev.1.00 Page 5 of 168 Sep 13, 2011 RX630 Group 1. Overview Communication function USB 2.0 function module (USBa) Includes a UDC (USB Device Controller) and transceiver for USB 2.0 Single port Compliance with the USB 2.0 specification Transfer rate: Full speed (12 Mbps) Self-power mode and bus power are selectable Incorporates 2 Kbytes of RAM as a transfer buffer Serial communications interfaces (SCIc, SCId) 13 channels (SCIc: 12 channels + SCId: 1 channel) SCIc Serial communications modes: Asynchronous, clock synchronous, and smart-card interface Multi-processor function On-chip baud rate generator allows selection of the desired bit rate Choice of LSB-first or MSB-first transfer Average transfer rate clock can be input from TMR timers for SCI5, SCI6, and SCI12 Simple I2C Simple SPI SCId (The following functions are added to SCIc) Supports the serial communications protocol, which contains the start frame and information frame Supports the LIN format I2C bus interfaces (RIIC) 4 channels (one of them is FM+) Communication formats I2C bus format/SMBus format Supports the multi-master Max. transfer rate: 1 Mbps (channel 0) IEBus (IEB) 1 channel Supports protocol control for the IEBus Half-duplex asynchronous transfer Multi-master operation Broadcast communications function Two selectable modes, differentiated by transfer rate CAN module (CAN) 3 channels Compliance with the ISO11898-1 specification (standard frame and extended frame) 32 mailboxes each Serial peripheral interfaces (RSPI) 3 channels RSPI transfer facility Using the MOSI (master out, slave in), MISO (master in, slave out), SSL (slave select), and RSPCK (RSPI clock) signals enables serial transfer through SPI operation (four lines) or clock-synchronous operation (three lines) Capable of handling serial transfer as a master or slave Data formats Switching between MSB first and LSB first The number of bits in each transfer can be changed to any number of bits from 8 to 16, or to 20, 24, or 32 bits. 128-bit buffers for transmission and reception Up to four frames can be transmitted or received in a single transfer operation (with each frame having up to 32 bits) Buffered structure Double buffers for both transmission and reception 12-bit A/D converter (S12ADa) 1 unit (1 unit × 21 channels) 12-bit resolution Conversion time: 1.0 s per channel (in operation with PCLK at 50 MHz) Operating mode Scan mode (single scan mode or continuous scan mode) Sample-and-hold function Reference voltage generation Three ways to start A/D conversion Conversion can be started by software, a conversion start trigger from a timer (MTU, TPU, or TMR), or an external trigger signal. A/D conversion of the temperature sensor output Table 1.1 Outline of Specifications (4/5) Classification Module/Function Description |
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