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R5F10RBCAFP Datasheet(PDF) 11 Page - Renesas Technology Corp |
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R5F10RBCAFP Datasheet(HTML) 11 Page - Renesas Technology Corp |
11 / 76 page RL78/L12 1. OUTLINE Page 11 of 73 R01DS0157EJ0001 Rev.0.01 2012.02.20 Under development Preliminary document Specifications in this document are tentative and subject to change. 1.5.2 44-pin products ch2 ch3 ch0 ch1 ch4 ch5 ch6 ch7 PORT 2 P20, P21 2 PORT 3 P30 to P32 3 PORT 1 P10 to P17 8 PORT 4 P40 VOLTAGE REGULATOR REGC INTERRUPT CONTROL RAM POWER ON RESET/ VOLTAGE DETECTOR POR/LVD CONTROL RESET CONTROL SYSTEM CONTROL RESET X1/P121 X2/EXCLK/P122 HIGH-SPEED ON-CHIP OSCILLATOR ON-CHIP DEBUG TOOL0/P40 SERIAL ARRAY UNIT0 (2ch) UART0 RxD0/P11 TxD0/P12 TIMER ARRAY UNIT0 (8ch) TI02/TO02/P17 (TI02/TO02/P12) TI03/TO03/P32 2 INTP0/P137 INTP3/P31, INTP4/P32 INTP1/P15(INTP1/P10), INTP2/P16(INTP2/P11) CSI01 SCK01/P15 SO01/P17 SI01/P16 BCD ADJUSTMENT SCK00/P10 SO00/P12 SI00/P11 CSI00 VSS TOOLRxD/P11, TOOLTxD/P12 VDD SCLA0/P60 SERIAL INTERFACE IICA0 SDAA0/P61 2 MULTIPLIER& DIVIDER, MULITIPLY- ACCUMULATOR XT1/P123 XT2/EXCLKS/P124 KEY RETURN 3 KR0/P12 to KR2/P10 DIRECT MEMORY ACCESS CONTROL PORT 6 P60, P61 2 BUZZER OUTPUT PCLBUZ0/P140, PCLBUZ1/P141 CLOCK OUTPUT CONTROL 2 TI01/TO01/P30 A/D CONVERTER 2 ANI0/P20, ANI1/P21 AVREFP/P20 AVREFM/P21 2 ANI20/P142, ANI21/P143 3 ANI17/P120, ANI18/P13, ANI19/P14 PORT 13 P137 PORT 14 P140 to P143 4 WINDOW WATCHDOG TIMER LOW-SPEED ON-CHIP OSCILLATOR RTC1HZ/P31 REAL-TIME CLOCK RL78 CPU CORE CODE FLASH MEMORY DATA FLASH MEMORY INTERVAL TIMER PORT 12 P121 to P124 4 P120, P125 to P127 4 LCD CONTROLLER/ DRIVER COM0 to COM7, COMEXP 22 SEG0 to SEG6, SEG17 to SEG21, SEG25 to SEG34 9 VL1 to VL4 CAPH CAPL RAM SPACE FOR LCD DATA TI07/TO07/P10 KR3/P140 TO00/P140 TI00/P141 Remark Functions in parentheses in the above figure can be assigned via settings in the peripheral I/O redirection register (PIOR) |
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