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TLE4699 Datasheet(PDF) 5 Page - Infineon Technologies AG |
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TLE4699 Datasheet(HTML) 5 Page - Infineon Technologies AG |
5 / 31 page TLE4699 Pin Configuration Data Sheet 5 Rev. 1.0, 2010-11-30 3 Pin Configuration 3.1 Pin Assignment TLE4699GM (PG-DSO-14 ) Figure 2 Pin Configuration PG-DSO-14 Package (top view) 3.2 Pin Definitions and Functions TLE4699GM (PG-DSO-14) Pin Symbol Function 1 RADJ Reset Threshold Adjust Connect an external voltage divider to adjust reset threshold; Connect to GND for using internal threshold. 2D Reset Delay Connect a ceramic capacitor from D (Pin 2) to GND for reset delay time adjustment; Leave open, if the reset function is not needed. 3, 4, 5 GND Ground Connect all pins to heat sink area. 6EN Enable High signal enables the regulator; Low signal disables the regulator; Connect to I if the enable function is not needed 7RO Reset Output Open collector output with an internal pull-up resistor to the output Q; An additional external pull-up resistor to the output Q is optional; Leave open if the reset function is not needed. 8SO Sense Output Open collector output with an internal pull-up resistor to the output Q; An additional external pull-up resistor to the output Q is optional; Leave open if the sense function is not needed. 9Q 5 V Regulator Output Connect a capacitor between Q (Pin 9) and GND close to the IC pins, respecting the values given for its capacitance CQ and ESR in the table Chapter 4.2 Functional Range. 10, 11, 12 GND Ground Connect all pins to heat sink area. PinConfig_PG-DSO-14.vsd SI I GND GND GND Q SO RADJ D GND GND GND EN RO 14 13 12 11 10 9 8 1 2 3 4 5 6 7 |
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