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HT83007 Datasheet(PDF) 10 Page - Holtek Semiconductor Inc |
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HT83007 Datasheet(HTML) 10 Page - Holtek Semiconductor Inc |
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10 / 40 page  HT83XXX Rev. 1.60 10 November 19, 2008 Program Memory - ROM The program memory stores the program instructions that are to be executed. It also includes data, table and interrupt entries, addressed by the program counter along with the table pointer. The program memory size for HT83XXX is 2048 ´15 bits. Certain locations in the program memory are reserved for special usage: · Location 000H This area is reserved for program initialization. The program always begins execution at location 000H each time the system is reset. · Location 004H This area is reserved for the time base interrupt ser- vice program. If the ETBI (intc.1) is activated, and the interrupt is enabled and the stack is not full, the pro- gram will jump to location 004H and begins execution. · Location 008H This area is reserved for the 8-bit Timer Counter 0 in- terrupt service program. If a timer interrupt results from a Timer Counter 0 overflow, and if the interrupt is enabled and the stack is not full, the program will jump to location 008H and begins execution. · Location 00CH This area is reserved for the 8-bit Timer Counter 1 in- terrupt service program. If a timer interrupt results from a Timer Counter 1 overflow, and if the interrupt is enabled and the stack is not full, the program will jump to location 00CH and begins execution. Table Location Any location in the ROM space can be used as look up tables. The instructions ²TABRDC [m]² (used for any bank) and ²TABRDL [m]² (only used for last page of pro- gram ROM) transfer the contents of the lower-order byte to the specified data memory [m], and the higher-order byte to TBLH (08H). Only the destination of the lower-order byte in the table is well-defined. The higher-order bytes of the table word are transferred to the TBLH. The table higher-order byte register (TBLH) is read only. The table pointer (TBLP) is a read/write register, which indicates the table location. Stack Register - Stack The stack register is a special part of the memory used to save the contents of the Program Counter. This stack is organized into four levels. It is neither part of the data nor part of the program space, and cannot be read or written to. Its activated level is indexed by a stack pointer (SP) and cannot be read or written to. At a sub- routine call or interrupt acknowledgment, the contents of the program counter are pushed onto the stack. The program counter is restored to its previous value from the stack at the end of subroutine or interrupt rou- tine, which is signaled by return instruction (RET or RETI). After a chip resets, SP will point to the top of the stack. The interrupt request flag will be recorded but the ac- knowledgment will be inhibited when the stack is full and a non-masked interrupt takes place. After the stack pointer is decremented (by RET or RETI), the interrupt request will be serviced. This feature prevents stack overflow and allows programmers to use the structure more easily. In a similar case, if the stack is full and a ²CALL² is subsequently executed, stack overflow oc- curs and the first entry is lost. Instruction Table Location *10 *9 *8 *7 *6 *5 *4 *3 *2 *1 *0 TABRDC [m] P10 P9 P8 @7 @6 @5 @4 @3 @2 @1 @0 TABRDL [m] 1 1 1 @7 @6 @5 @4 @3 @2 @1 @0 Table Location Note: *10~*0: Current program ROM table @7~@0: Write @7~@0 to TBLP pointer register P10~P8: Bits of current program counter 0 0 0 0 H 0 0 0 4 H 0 0 0 8 H P r o g r a m R O M 0 0 0 C H I n i t i a l A d d r e s s T i m e B a s e I n t e r r u p t S u b r o u t i n e T i m e r 0 I n t e r r u p t S u b r o u t i n e T i m e r 1 I n t e r r u p t S u b r o u t i n e 0 7 F F H 0 0 1 5 H Program Memory |
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