MCM101524

3

MOTOROLA FAST SRAM

AC OPERATING CONDITIONS AND CHARACTERISTICS

(VEE = – 5.2 V ± 5%, VCC = 0 V, TJ = 0 to +60°C, Unless Otherwise Noted)

Input Pulse Levels

– 1.7 V to – 0.9 V (See Figure 1)

. . . . . . . . . . . . .

Input Rise/Fall Time

1 ns

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input Timing Measurement Reference Level

50%

. . . . . . . . . . . . . . . .

Output Timing Measurement Reference Level

VOH = – 1165 mV

. .

VOL = – 1475 mV

Output Load (AC Test Circuit)

See Figure 2

. . . . . . . . . . . . . . . . . . . . .

MCM101524–12

MCM101524–15

Parameter

Symbol

Min

Max

Min

Max

Unit

Notes

Read Cycle Time

tAVAV

12

—

15

—

ns

2, 3

Address Access Time

tAVQV

—

12

—

15

ns

Chip Select Access Time

tSLQV

—

12

—

15

ns

6

Select High to Output Low

tSHQL

0

8

0

9

ns

Output Hold from Address Change

tAXQX

4

—

4

—

ns

Power Up Time

tSLIEEH

0

—

0

—

ns

4

Power Down Time

tSHIEEL

—

12

—

15

ns

4

NOTES:

1. W is high for read cycle.

2. Product sensitivites to noise require proper grounding and decoupling of power supplies during read and write cycles.

3. All read cycle timings are referenced from the last valid address to the first transitioning address.

4. This parameter is sampled and not 100% tested.

5. Device is continuously selected (S

≤ VIL).

6. Addresses valid prior to or coincident with S going low.

80%

Figure 1. Input Levels

Figure 2. AC Test Circuit

AC TEST CONDITIONS

50%

20%

20%

50%

80%

– 0.9 V

– 1.7 V

tf

tr

VCC

VEE

Q

CL

RL

– 2.0 V

0.01

µF

0.1

µF

tr = Rise Time

tf = Fall Time

50% = Timing Reference Levels

RL = 50 Ω

CL = 30 pF