MOTOROLA

MC92307_DS - 8/12/97

4

Figure 3. Data I/O for the Non-multiplexed Mode

FFTSTART

The input of a data block into the FFT device starts with

a pulse of the FFTSTART signal. It must be delivered

together with the real part of the first time domain sam-

ple and should last 1..2 clock cycles.

DIN [7:0]

These pins accept the input data with a wordlength of

8 bit. In the muxed mode first the real part of a sample

must be provided followed by the imaginary part. In the

non-muxed mode only the imaginary part must be deliv-

ered to DIN. The data format is fixed to 2’s complement.

DINR [7:0]

In the non-muxed mode (NOMUX = H) the real part of

the input samples is entered into the FFT device via

these pins (they should be connected to a fixed level if

the muxed mode is used). As the DIN inputs these in-

puts expect 2’s complement format.

FFT Device -> OFDM Device

SYMSYNC

The start of the output of a FFT block after processing

is indicated by a pulse of the SYMSYNC signal with a

duration of 2 clock cycles. It is delivered together with

the real part of the first output sample.

DOUT [11:0]

These pins deliver the output data of the FFT device in

2’s complement format. In the non-muxed mode

(NOMUX = H) the real part of the samples is followed by

the imaginary part. In the muxed mode only the imagi-

nary parts appears at the DOUT pins.The valid bits are

adjusted using the RES pins, see above.

DOUTR [11:0]

In the non-muxed mode (NOMUX = H) the real part of

the output samples appears at these pins in 2’s comple-

ment format. The wordlength selection by the RES pins

is also valid for DOUTR. If the non-muxed mode is used

these pins may be left unconnected.

CLK

X0r

X1r

Xir

X(i+1)r

DINR

...

...

DIN

...

FFTSTART

Z(N-i)r

Z(N-i+1)r

Z0r

Z1r

DOUTR

...

...

DOUT

X0q

X1q

Xiq

X(i+1)q

...

SYMSYNC

Z(N-i)q

Z(N-i+1)q

Z0q

Z1q

...

...

External Interfaces