MC92307

MOTOROLA

Rev.1.1

3

PRBS Descrambling

The error corrected data from the Reed Solomon

decoder is de-randomized using a PRBS generator

initialized every 8 MPEG transport packets with the val-

ue 100101010000000 as per the DVB specification.

master (host microprocessor) initiates all data transfers

clock. Data is always transferred one byte at a time,

MSB first, and the receiver must acknowledge each

byte by pulling the data line low during the cycle follow-

ing the LSB (acknowledge cycle). The demodulator in-

terprets the byte following its slave address as an 8-bit

sub-address which selects a particular register to be

and is driven by an open-drain output in the MC92305.

External pull-up resistors are required to implement the

wired-AND function on each of these signals, per the

Σ∆ Interfaces

The single-bit outputs which interface to analog

circuits are VCOOUT, AGCOUT and CTLOUT. These

are the loop filter outputs for the MSS symbol sync,

AGC and Carrier Tracking Loop, respectively. The dig-

ital sigma-delta converters which drive these outputs

have programmable output sampling rates up to a max-

imum of 4.0Rs. The bandwidths of each of these loops

and the output sampling rates of the loops (input sam-

pling rates of the sigma-delta converters) are program-

mable. The sigma-delta output sampling rates should

be commensurate with the loop bandwidths and loop

output sampling rates selected.

Pin-Programmable Interfaces

A variety of functions are selectable by hard-wiring

interface. These fall in the category of functions which

will seldom be changed once a particular application

circuit is debugged and functioning correctly. The pin

programmable features are:

•

IQSWAP - Swap internal I and Q data paths

•

IN_FMT - Specify A/D output data format (two’s

complement or offset binary)

•

SYM_FE - specify which edge of the output symbol

clock is to be aligned with the symbols.

•

TSTMODE - Used during production testing of the

device but can also be used to disable and bypass

certain of the functions in the MC92305.

Software-Configurable Items

The command interfaces can address a variety of

internal registers to configure most critical demodulator

and decoder parameters. These include: all loop band-

widths, equalizer tap values and equalizer control (load

taps and adapt, load taps and freeze, adapt without

loading and freeze without loading), the filter coeffi-

cients of the receive lowpass filter, the lock detector

thresholds for MSS lock and Carrier lock, the center tap

fixed gain adjustment, the NCO frequency preset, soft-

ware reset (which performs the same function as the

hardware power-on reset), upper and lower limits on

the NCO frequency and, input and output sampling

rates of each digital sigma-delta converter.

Software-Readable Items

All of the software-configurable registers are also

readable. This is intended to allow the host to interro-

gate the demodulator prior to changing parameters.

There are also a number of demodulator registers

which are read-only and are intended to provide useful

demodulator status information to the host for monitor-

ing and debugging purposes. These include: NCO fre-

quency (which provides an indirect measurement of the

frequency error in the channel tuner and modem local

oscillators), AGC control value (an indicator of received

signal power), constellation variance (an indicator of re-

ceived energy per symbol to noise power spectral den-

sity) Es/No, (used in generating the carrier lock detect

signal) and, MSS control value (which provides an indi-

rect measurement of baud rate error and is used in gen-

erating the MSS lock detect signal).