ICS9FG1201H_11 datasheet(3/23 Pages) IDT

Part #	ICS9FG1201H

Description	Frequency Gearing Clock for CPU, PCIe Gen1, Gen2, & FBD

Download	23 Pages

Scroll/Zoom	100%

Manufacturer	IDT [Integrated Device Technology]

Direct Link	http://www.idt.com

Logo

3 / 23 page

IDTTM/ICSTM

Frequency Gearing Clock for CPU, PCIe Gen1, Gen2, & FBD

1371F — 09/23/09

ICS9FG1201H

Frequency Gearing Clock for CPU, PCIe Gen1, Gen2, & FBD

3

Pin Description

Power Groups

VDD

GND

56

55

Main PLL, Analog

11,22,38,50 12,23,37,49

DIF clocks

Description

Pin Number

Pin # Pin Name

Type

Pin Description

1

HIGH_BW#

IN

3.3V input for selecting PLL Band Width

0 = High, 1= Low

2

CLK_IN

IN

Input for reference clock.

3

CLK_IN#

IN

"Complementary" reference clock input.

4

SMB_A0

IN

SMBus address bit 0 (LSB)

5

OE0#

IN

Active low input for enabling DIF pair 0.

1 = tri-state outputs, 0 = enable outputs

6

DIF_0

OUT

0.7V differential true clock output

7

DIF_0#

OUT

0.7V differential complement clock output

8

OE1#

IN

Active low input for enabling DIF pair 1.

1 = tri-state outputs, 0 = enable outputs

9

DIF_1

OUT

0.7V differential true clock output

10

DIF_1#

OUT

0.7V differential complement clock output

11

VDD

PWR

Power supply, nominal 3.3V

12

GND

PWR

Ground pin.

13

DIF_2

OUT

0.7V differential true clock output

14

DIF_2#

OUT

0.7V differential complement clock output

15

OE2#

IN

Active low input for enabling DIF pair 2.

1 = tri-state outputs, 0 = enable outputs

16

DIF_3

OUT

0.7V differential true clock output

17

DIF_3#

OUT

0.7V differential complement clock output

18

OE3#

IN

Active low input for enabling DIF pair 3.

1 = tri-state outputs, 0 = enable outputs

19

DIF_4

OUT

0.7V differential true clock output

20

DIF_4#

OUT

0.7V differential complement clock output

21

OE4#

IN

Active low input for enabling DIF pair 4

1 = tri-state outputs, 0 = enable outputs

22

VDD

PWR

Power supply, nominal 3.3V

23

GND

PWR

Ground pin.

24

DIF_5

OUT

0.7V differential true clock output

25

DIF_5#

OUT

0.7V differential complement clock output

26

OE5#

IN

Active low input for enabling DIF pair 5.

1 = tri-state outputs, 0 = enable outputs

27

SMB_A1

IN

SMBus address bit 1

28

SMBDAT

I/O

Data pin of SMBUS circuitry, 5V tolerant

Similar Part No. - ICS9FG1201H_11

Manufacturer	Part #	Datasheet	Description
Integrated Device Techn...	ICS9FG1201HFLF-T	264Kb / 21P	Frequency Generator for CPU, PCIe Gen1 & Fully Buffered DIMM Clocks
Integrated Device Techn...	ICS9FG1201HGLF-T	264Kb / 21P	Frequency Generator for CPU, PCIe Gen1 & Fully Buffered DIMM Clocks

More results

Similar Description - ICS9FG1201H_11

Manufacturer	Part #	Datasheet	Description
Renesas Technology Corp	ICS9FG1201H	391Kb / 24P	Frequency Gearing Clock for CPU, PCIe Gen1, Gen2, & FBD 09/23/09
	ICS9FG1200D-1	350Kb / 24P	Frequency Gearing Clock for CPU, PCIe Gen1, Gen2 & FBD 2019
	9FG1901H	340Kb / 19P	Frequency Gearing Clock for CPU, PCIe Gen1 & FBD 02/02/10
Integrated Device Techn...	9FG1901H	194Kb / 18P	Frequency Gearing Clock for CPU, PCIe Gen1 & FBD
Integrated Device Techn...	ICS9FG1200D-1	292Kb / 23P	Frequency Gearing Clock for CPU, PCIe Gen1, Gen2
Renesas Technology Corp	ICS9FG108E	450Kb / 20P	FREQUENCY GENERATOR FOR CPU, QPI, FBD, PCIE GEN1/2 & SATA 2019
Renesas Technology Corp	ICS9FG1904B-1	415Kb / 23P	Frequency Generator for CPU, PCIe Gen 1, PCIe Gen 2 & FBD 2019
Integrated Circuit Syst...	ICS9FG1904B-1	221Kb / 22P	Frequency Generator for CPU, PCIe Gen 1, PCIe Gen 2 & FBD
Integrated Device Techn...	ICS9FG104D	167Kb / 17P	Frequency Generator for CPU, QPI, FBD, PCIe Gen 2 & SATA
Integrated Device Techn...	ICS9FG104	246Kb / 17P	Frequency Generator for CPU, QPI, FBD, PCIe Gen 2 & SATA

More results

ICS9FG1201H Datasheet(PDF) 3 Page - Integrated Device Technology

ICS9FG1201H Datasheet(HTML) 3 Page - Integrated Device Technology

Similar Part No. - ICS9FG1201H_11

Similar Description - ICS9FG1201H_11

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23

Datasheet Download

Link URL