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ACS522D01AHGYYX Datasheet(PDF) 2 Page - Integrated Device Technology |
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ACS522D01AHGYYX Datasheet(HTML) 2 Page - Integrated Device Technology |
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2 / 72 page  2 V0.5 04/11 ©2011 INTEGRATED DEVICE TECHNOLOGY, INC. ACS522X01 ACS522x01 LOW-POWER, HIGH-FIDELITY, INTEGRATED CODEC TABLE OF CONTENTS 1. OVERVIEW ................................................................................................................................ 7 1.1. Block Diagram ...................................................................................................................................7 1.2. Audio Outputs ....................................................................................................................................7 1.3. Audio Inputs .......................................................................................................................................8 2. POWER MANAGEMENT .......................................................................................................... 9 2.1. Control Registers ...............................................................................................................................9 2.2. Stopping the Master Clock .................................................................................................................9 3. OUTPUT AUDIO PROCESSING ............................................................................................. 10 3.1. DC Removal ....................................................................................................................................10 3.2. Volume Control ................................................................................................................................11 3.3. Digital DAC Volume Control .............................................................................................................12 3.4. Parametric Equalizer .......................................................................................................................12 3.4.1. Prescaler & Equalizer Filter ...............................................................................................12 3.4.2. EQ Registers ......................................................................................................................13 3.4.3. Equalizer, Bass, Treble Coefficient & Equalizer Prescaler RAM .......................................15 3.5. Gain and Dynamic Range Control ...................................................................................................18 3.6. Limiter ..............................................................................................................................................18 3.7. Compressor .....................................................................................................................................19 3.7.1. Configuration ......................................................................................................................20 3.7.2. Controlling parameters .......................................................................................................20 3.7.3. Overview ............................................................................................................................21 3.7.4. Limiter/Compressor Registers ............................................................................................23 3.7.5. Expander Registers ...........................................................................................................25 3.8. Output Effects ..................................................................................................................................26 3.9. Stereo Depth (3-D) Enhancement ...................................................................................................26 3.10. Psychoacoustic Bass Enhancement ..............................................................................................27 3.11. Treble Enhancement .....................................................................................................................27 3.12. Mute and De-Emphasis .................................................................................................................28 3.13. Mono Operation and Phase Inversion ...........................................................................................29 3.13.1. DAC Control Register .....................................................................................................29 3.13.2. Interpolation and Filtering ................................................................................................30 3.14. Analog Outputs ..............................................................................................................................31 3.14.1. Headphone Output ...........................................................................................................31 3.15. Other Output Capabilities ..............................................................................................................32 3.15.1. Audio Output Control .......................................................................................................32 3.15.2. Headphone Switch ...........................................................................................................32 3.15.3. Headphone Operation ......................................................................................................33 3.15.4. EQ Operation ...................................................................................................................33 4. INPUT AUDIO PROCESSING ................................................................................................. 34 4.1. Analog Inputs ...................................................................................................................................34 4.1.1. Input Registers ...................................................................................................................35 4.2. Mono Mixing and Output Configuration ...........................................................................................35 4.2.1. ADC Registers ...................................................................................................................36 4.3. Microphone Bias ..............................................................................................................................37 4.3.1. Microphone Bias Control Register .....................................................................................37 4.4. Programmable Gain Control ............................................................................................................37 4.4.1. Input PGA Software Control Register. ...............................................................................38 4.5. ADC Digital Filter .............................................................................................................................38 4.5.1. ADC Signal Path Control Register .....................................................................................40 4.5.2. ADC High Pass Filter Enable modes .................................................................................40 4.6. Digital ADC Volume Control .............................................................................................................40 4.6.1. ADC Digital Registers ........................................................................................................41 4.7. Automatic Level Control (ALC) ........................................................................................................41 4.7.1. ALC Operation ..................................................................................................................41 4.7.2. ALC Registers ....................................................................................................................43 4.7.3. Peak Limiter .......................................................................................................................44 4.7.4. Input Threshold ..................................................................................................................44 |
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